Onkyo TX-SR604E - Page 99

192K
Bytes
RAM
Bytes
ROM
768K
Memory Controller
C67x+
DSP Core
Program
Cache
Crossbar Switch
EMIF dMAX
McASP0
SPI1
McASP1
I2C0
I2C1
RTI
SPIO
McASP2
PLL OSC
ASYNC
FLASH
100 MHz
SDRAM
DSP
Host
Microprocessor
Audio Zone 1
SPI or I2C
Control (optional)
Audio Zone 2
Audio Zone 3
CODEC, DIR,
ADC, DAC, DSD,
Network
Network
ADC, DAC, DSD,
CODEC, DIR,
Digital Out
DSP Control
SPI or I2C
5 Independent Audio
Zones (3 TX + 2 RX)
16 Serial Data Pins
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -39
Q201 : TMS320DA707 (32 bit Floating-Point Digital Signal Processor)
SYSTEM DIAGRAM with PERIPHERALS
TX-SR604/604E/8460