15.14. DG-Board (4 of 5) Block Diagram
LRCK0
TV_MAIN_ON
XRST
LOSDHIN
VI1HSYNC
TRST
DAUDIO
XIRQ3
VI1VSYNC
TCK
PEAKS_OSDCKO
PANEL_SOS
VI1ENB
TO_HQ1L
MDO7
PEAKS_OSHIN
PANEL_STATUS
TMS
CLK74SEL
MDO5
PEAKS_YS
SD_BOOT_STS
TO_SC
CH0PSYNC
LOSDCLKIN
VI1CLK
DVB_CVBS
CH0VAL
MDO1
LOSDVIN
SCL2
VI1CKOUT
CH0PSYNC
AUDCLK
PEAKS_YM
CH0CLK
SBO2
SDA2
CH0DATA
VI2ENB
SLRCK
PEAKS_YS
MDO6
SBO0
CH0CLK
ADCCK
SCL1
PEAKS_OSHIN
SBI2
SDA3
TV_MAIN_ON
PEAKS_OSDCKO
SCL3
HSOE
SDA1
PEAKS_YM
SDA0
SBI0
DMIX0
HSOE
LOSDVIN
SCL0
SRCK0
CLKOF
CH0DATA
LOSDHIN
MDO2
VSOE
FE_XRST
CNFIG_DONE
MDO3
LOSDCLKIN
FPGA_XRST
MDO4
IS0PSYNC
CH0VAL
SW_OFF_DET
XIRQ2
VI1P20
CLKOF
SDA3
SCL2
VSOE
SCL3
SDA2
PANEL_MUTE
PANEL_MUTE
DTV_VOUTENB
XECS2
XECS1
XECS0
SBI0
SBO0
SRQGENX
PANEL_MUTE
SUB3.3V
SRCK0
VI2P10
ADIN
CK27D
VC27
SUB5V
DAUDIO
VI2ENB
SUB3.3V
Q8913
CLK74
SUB1.2V
DMIX0
CK27
SCL3
SUB5V
DTV9V
ADCCK
SUB3.3V
TMS
TRST
LRCK0
SLRCK
TDI
SDA0
TCK
AUDCLK
SDA2
SBO2
Q8911
TDO
SCL0
SUB3.3V
SBI0
XIRQ2
X003
SUB3.3V
XECS6
SBI2
Q8402
XRST
SBO0
VOUTENB
SDA3
SUB1.8V
SUB3.3V
XIRQ3
RMCO
SDA1
SCL1
SUB5V
IECOUT0
DSRCK
SCL2
VI2P21
Q8912
SUB3.3V
Q8401
ExBUS
62
48
32
IREQ#
BOE2-BOE9
CE1#
14
BOE2
BUFFER
38
ROE2-ROE9
TUNER SERIAL TS
17
35
MD02
TDO(TO SC)
SPDATA
15
SDBOOT
MD03
18
CLKOF
ETHER_IRQ
MD04
RSV2(SDRAMCHK2)
11
Comp.
SDCLK
SDDAT3
with AUDIO DESCRIPTION DATA
16
SDAT0
7
PEAKS_OSHIN
6 9
74
SUB 5V
SUB 3.3V
512M DDR
CFG_JTAG
VIN
SUB 5V
MAIN AUDIO DATA
LVDS_EN
Address
MOSTRT
SBO1(VI1P20)
DIGITAL AUDIO
(IS1CLK)OSD_FLAG
VI2CKOUT
SUB1.8V
ISODATA
VI2HSYNC
COMMON LR/SR CLK
74M
MVDAC03
for PHOTO OUT
CLOCK GENE.
LOSD OUT (HQ1) SERIAL I/F
27M
53
VMUTE
CONTROL
4
52
DATA0-7
AUDIO IF
9
A0~A14
GOE2-GOE9
CPU BUS I/F
VCC
MD05
UV0-9
BOE9
7
MD06
VI1P2-9
MOVAL
LOSDO0-LOSDO15
51
POD,CI I/F
S2
VI1P12-19
MD00
CARD 5V
14
MD01
TDI(TO HQ1)
VOUT
SUB 5V
ENINA,CLKINA
105
MD07
RESET
INTERFACE)
REG,WE,IOWR,IORD,OE,CE1
MOCLK
HDMI_IRQ
58
ED0-ED15
56
23
RSV3(SDRAM_CHK1)
8
B Port
EA8-EA23
(VI2P6)LOSDOUT_YM
RSV4
(VI2P5)LOSDOUT_YS
VI2VSYNC
RSV1(SD_ERROR)
36
MISTRT
(VI2P2)LOSDOUT_CLKO
VI2P4
XRTS0(ISOPSYNC)
47
PKTSTINA
VI2P22-29
ED0-ED15/EA8-EA23
RESET
JK8401
(VI2P3)LOSDOUT_H_O
EA0-EA7,EA24
30
FE_IRQ
HQ1L VIDEO
FE_XRST
MVCLK
D0~D7
50
44
7
TCK
36
GOE2-GOE9
41
/VIN
IFD2
Vpp1,Vpp2
VIN
66
OE#,WE#
30
(VOP19)
47
(VOP2)
17
50
IFD1
(VOP9)
PANEL_STATUS
37
86
PANEL_SOS
+1.8V
59
COMMON PORT .etc
60
24
5
BUFFER
64
20.48MHz
XTI
(VOP22)
42
9
CLK2
(VOP29)
(VOP12)
DATA2
+1.8V
59
3.3V
32
1
Y0-9
31
BOE2
SDCLK
/IRQ
93
I2C
DG52
50
CI_POWER_ON
SUB9V
R0-4
CI_OCP
6
IIC I/F
57
EN
COFDM DEMODULATOR
SUB 9V
36
MDO0-MDO2
10
POD
CI
I/F
2
14
53
SUB5V
LOSDVIN
CI_XRST(VI2P20)
49
9
PEAKS_Lite 2
EA16-23
MIBAL,MCLKI
46
SUB 9V
JTAG
VDD
ADV7493
ED0-ED15
FAULT
JTAG
SDCMD
CVDD
8
CH,IS IF
EA1-EA23
1
CONTROL
TMS,TRST
11
ROE9
75
10
(128/256Mbit)
DG
SDDTC
GOE2
1337
VSOE
ROE2
AGC1
BOE9
3
49
CI PARALLEL
TS
61
GOE9
57
SCL0
DATA BUFFER
CD1#,CD2#
SDA0
4
D-LATCH
I2C
VI1P22-29
MHSYNC
21
CLKIA(VI1CLK)
GOE9
6
I2C
(VI2P9)LOSD_H_I
CLKOA(VI1CKOUT)
MVSYNC
I2C
BUFFER
NOR FLASH
SD CARD
(VI2P8)LOSD_CLK_I
45
ADDRESS
CI SLOT
95
IORD#,IOWR#
SDCMD
(VI2P7)LOSD_V_I
61
DIGITAL SIGNAL PROCESSOR
SDAT1
52
20
35
SCL0
34
107
63
VSIA(VI1VSYNC)
BB
14
LOSDHIN
3
HSIA(VI1HSYNC)
SDWP
SD CARD I/F
VDD
1
VI1ENB
SDAT3
SDCD
PEAKS_OSDCKO
58
12
SDAT2
32
TRST
29
ISODATA
BUFFER
12
Sub Video
53
Input
IF_AGC
TDI,TDO
MDO3-MDO7
DATA1
XT0
10
REG#
CHDI0-CHDI7
57
40
67
CHVAL,CHSYNC,CHCLK,SMTCMD0,SMTSEL0,XPDWT,SMTCLK0
1
CNFIG_DONE
RESET
EA1-EA15
GOE2
56
4
OSD_FLAG
11
2
ROE2-ROE9
TO
DH25
18
PEAKS LITE2 RESET
ROE9
MDI0~MDI7
HQ1_XRST
SDDAT2
FPGA_RST
SDDAT1
42
FRONT END
5
63
62
33
8
CLK1
VI2P12-19
PEAKS_YS
EEPROM
37
EA08-15
LOSDOUT0
IC8302
TMS,TCK
52
8
SDDAT0
51
EA24
LOSDOUT15
BM
65
SD_LED_ON
BOE2-BOE9
3
LOSDCLKIN
7
SDWP
VIN
84
104
6
77
Analog
Video
I/F
SUB3.3V
35
ROE2
SDA0
TS BUFFER
CLOCK GEN
4743 7
DATA0-7
14
5
EEPROM_WP
HSOE
ENOUT,PKTRTOUT
(COMMON
TV_MAIN_ON
SDA
VCC
DG25
102
TU8301
30
19
WP
ED0-ED7
56
PEAKS_YM
15
DATA( 8 b it )
34
LOSD0
LOSD15
64
DVB TUNER
JTAG
MCLK0,WAIT#
SCL
6
DATA0-7
51
SCL
SDA
16
31
IC8403
IC8406,IC8407
IC8401
IC8554
IC8402
IC8409
IC8408
IC8404,05
IC8301
IC8621,22
IC8001
IC8004
IC5660
IC8601
IC8002,03
58
(DeMPX)
+5V
IC8304
DTV9V
VI2HSYNC
UV0-7
Y0-7
VI2CKOUT
VI2VSYNC
VI2CLK2
36
XRST
XRST
35
SUPPORT
8701
CARD
JK
XRST
XECS2
33 79
XECS1
32
XECS0
XEDK
3941
ESZ0
72
ECLK
ESZ1
XEWE1
XEWE0
43 706846
XERE
XIRQ1
ERXW
67 4445
XNMIRQ
SBO
SBI
65 66
58
57
55
JTAG
58
54
TDO,TDI
TMS,TRST
TCK
XEAS
BOOTSWAP
38 74 87
MODEMLED
89
23
EA24
10
EA0
101
8
ED15
1
ED0
110
81
30
82
29
SUB3.3V
28
63
SUB5V
27
64
321
SUB5V
SBO0
SBI0
JK
8702
FACTORY
FOR
USE
XERE
XEDK
XIRQ1
ERXW
ESZ0
ECLK
XECS4
ESZ1
XEWE0
XEWE1
BOOTSWAP
XNMIRQ
PANEL_MUTE
48
1
2
3
103
ADDRESS EA0-EA24
ADDRESS ED0-ED15
36
22
23
25
24
21
PZ70B/E ONLY
TH-42PY70F/P, PZ70B/E
DG-Board (4 of 5) Block Diagram
TH-42PY70F/P, PZ70B/E
DG-Board (4 of 5) Block Diagram
TH-42PZ70B / TH-42PZ70E / TH-42PY70F / TH-42PY70P
78
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