Parker Vansco VMM1210 - Page 37

User Guide 27
Outputs
High-Side/Low-Side Output Specifications
Item
MIN
NOM
MAX
UNIT
Maximum output current
-
-
3
A
Short circuit trip point (high-side)
-
8
-
A
Short circuit trip point (low-side)
-
28
-
A
Leakage to ground, off state
4
-
-
kΩ
Leakage to battery, off state
-
-
12
µA
Acceptable Voltage on Low Side Ground
(J2-1F with respect to J1-3A) (see note)
-1.0
0
2.0
V
High-side turn on time (enable signal to 90%)
80
-
400
µs
High-side turn off time (/enable signal to 10%)
80
-
400
µs
High-side slew rate rising edge,
10% to 30%, Rload = 12Ω
0.1
-
1.0
V/µs
High-side slew rate falling edge,
70% to 40%, Rload = 12Ω
0.1
-
1.0
V/µs
Low-side turn on time (enable signal to 90%)
-
40
100
µs
Low-side turn off time (/enable signal to 10%)
-
70
170
µs
Low-side slew rate rising edge,
50% to 70%, Rload = 2.2Ω
-
1
3
V/µs
Low-side slew rate falling edge,
70% to 50%, Rload = 2.2Ω
-
1
3
V/µs
Open load detection resistance
-
10
-
kΩ
Output pin capacitance
-
0.01
-
µF
Note: This is the voltage range over which the low side outputs will operate properly. Voltage
differences from low side ground to logic ground beyond these levels could result in the low
side outputs turning on or off unexpectedly.
The outputs have the ability to be programmed for PWM duty cycles, excluding
H-Bridge.
 The outputs have a single programmable frequency which is shared with
OUTPUT1_10A_HS to OUTPUT8_10A_HS.