Philips pm2521 - Page 113

HEF4027B DUAL
JK FLIP-FLOP
101
131
12
Sdi
Jl 0,
|>CPi
FF
Ki
0i
Oqi
15
u
Sd2
J2
02
]>CP2 FF
K2
02
CD2
Functional diagram
FUNCTION TABLES
inputs
outputs
So
s
CP J K 0 0
H
L
X
X X
H
L
L H
X
X X
L H
H
H
X
X
X H H
H= HIGH
state (the more
positive voltage)
L=
LOW
state (the less
positive voltage)
X= state
is
immaterial
J
=
positive-going
transition
0
+
1
=
state
after clock
positive transition
n
[i^rr^|u]pf)2|fiTif?^|iri
VoD
0i 0i
CPi
Cqi
Ki
j,
Sqi
^
HEF
4027 B
O
2
O
2
OP
2
^^02
^2
•'2
^D2 '^SS
LU IJJ
[4J [5J 1_^ [8J
Pinning
diagram
PINNING
J, K synchronous inputs
CP clock input
(L
to H edge-triggered)
Sq
asynchronous set -direct input (active
HIGH)
asynchronous clear-direct input (active
HIGH)
O
true
output
0
complement
output