When the fixed
level is reached, the comparator switches and
on receipt of the
next
clock-pulse the
flip-flop
changes its state.
The flip-flop
output is
fed back
to
control
the switches that
connect
the charging
current
(I
-I-
A I) and
the discharging current (I
—
A I) to
the capacitor.
The ADC
output (DATA)
from the
flip-flop
is a
square-wave,
the
duty-cycle
of which is determined
by
the
charge/discharge
times. This
is routed to a
counter together
with the clock pulses.
During
the
logic 1
state of the
data
signal the clock pulses are
counted.
To
obtain automatic
zero, i.e.
to
counteract drift and internal
offset, one
complete measurement
consists
of two fixed
measuring periods. This auto-zero function is
carried out
with the aid
of
the AZ
and AZ signals
from
the control logic.
When a
measurement is started
(1st.
measuring
period), the unknown
voltage is supplied to
the
-i-
input
of the
OQ0064
while the
—
input is connected to
zero. The signal which is
converted will
be
+
Vin
-i-
Voff;
i.e.
I
+
Al.|
+
AI
2
(Al.| is caused by the input voltage. AI
2
is
caused by the
offset).
In
the second
measuring period, the input signal is connected to
the
—
input
while the
-H
input is
now
connected
to
zero.
This signal
which
is
converted,
will
be
--
Vin
+
Voff.; i.e.
I
—Al.j
+
AI
2
(Al.| is caused by
the input
voltage, AI
2
is
caused by the offset).
The
results of
the
two
measurements
are
subtracted and divided by two:
I
-t
Al.|
-t
AI
2
1st. measurement
I
—
Al.|
+
AI
2
2nd. measurement
2AI.|
which divided by
two
=
Al.|
the counted value
for display.
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