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Quectel RM502Q-GL - Page 48

Quectel RM502Q-GL
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5G Module Series
RM502Q-GL Hardware Design
RM502Q-GL_Hardware_Design 47 / 83
Primary mode (short frame synchronization): the module works as both master and slave
Auxiliary mode (long frame synchronization): the module works as master only
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256
kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz
PCM_CLK at 16 kHz PCM_SYNC.
In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with a
256 kHz PCM_CLK and an 8 kHz, 50 % duty cycle PCM_SYNC only.
The module supports 16-bit linear data format. The following figures show the primary mode’s timing
relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary mode’s timing
relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK.
PCM_CLK
PCM_SYNC
PCM_DOUT
MSB
LSB
MSB
125 μs
1 2 256255
PCM_DIN
MSB
LSBMSB
Figure 22: Primary Mode Timing

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