Quectel RM510Q-GL - Page 23

5G Module Series
RM510Q-GL Hardware Design
RM510Q-GL_Hardware_Design 22 / 88
27
GND
Ground
28
PCM_SYNC
DI, PD
PCM data frame sync
1.8 V
29
USB_SS_TX_M
AO
USB 3.1 super-speed
transmit (-)
30
USIM1_RST
DO, PD
(U)SIM1 card reset
USIM_VDD
1.8/3.0 V
31
USB_SS_TX_P
AO
USB 3.1 super-speed
transmit (+)
32
USIM1_CLK
DO, PD
(U)SIM1 clock
USIM_VDD
1.8/3.0 V
33
GND
Ground
34
USIM1_DATA
DIO, PU
(U)SIM1 card data
USIM_VDD
1.8/3.0 V
35
USB_SS_RX_M
AI
USB 3.1 super-speed
receive (-)
36
USIM1_VDD
PO
(U)SIM1 card power
supply
USIM_VDD
1.8/3.0 V
37
USB_SS_RX_P
AI
USB 3.1 super-speed
receive (+)
38
SDX2AP_STATUS
DO, PD
Status indication to AP
1.8 V
39
GND
Ground
40
QTM0_PON
DO
mmWave antenna
control 0
1.8 V
41
PCIE_TX_M
AO
PCIe transmit (-)
42
QTM1_PON
DO
mmWave antenna
control 1
1.8 V
43
PCIE_TX_P
AO
PCIe transmit (+)
44
QTM2_PON
DO
mmWave antenna
control 2
1.8 V
45
GND
Ground
46
QTM3_PON
DO
mmWave antenna
control 3
1.8 V
47
PCIE_RX_M
AI
PCIe receive (-)
48
QTM_VDD_1V9
PO
Power supply for
mmWave antenna
modules