5G Module Series
RM510Q-GL Hardware Design
RM510Q-GL_Hardware_Design 33 / 88
VCC(H)
RESET#(H)
USB/PCIe
Module Status
FCPO#
RFFE_VIO_1V8
Turn-off procedureRunning OFF
AT+QPOWD USB/PCIe removed
1.5 V
3.7 V
V
IH
≥ 1.19 V
1.8 V or 3.0 V
1.8 V
USIM_VDD
T
turn-off
Figure 11: Turn-off Timing through AT Command and FULL_CARD_POWER_OFF#
Table 11: Turn-off Time through AT Command and FULL_CARD_POWER_OFF#
1. After the host detects that the module USB/PCIe is removed, FCPO# pin must be pulled down.
2. After turning off the module, it is recommended to cut of VCC power supply.
3.6. Reset
RESET# is an asynchronous and active low signal (1.5 V logic level). Whenever this pin is active, the
module will immediately enter Power On Reset (POR) condition.
Table 12: Definition of RESET# Pin
Reset the module
Active LOW.
V
IH
max = 1.575 V
V
IH
min = 1.25 V
V
IL
max = 0.45 V
Internally pulled up to
1.5 V with a 100 kΩ
resistor
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