Quectel RM510Q-GL - Page 36

5G Module Series
RM510Q-GL Hardware Design
RM510Q-GL_Hardware_Design 35 / 88
The reset scenario is illustrated in the following figure.
VCC(H)
RESET#
Module Status
FCPO#(H)
RFFE_VIO_1V8
ResettingRunning Restarting
1.5 V
3.7 V
USIM_VDD
250 ms ≤ T
RST#
≤ 600 ms
V
IH
≥ 1.19 V
1.8 V or 3.0 V
1.8 V
T
RST#-USIM
Figure 14: Resetting Timing through RESET#
Table 13: Resetting Time through RESET#
Symbol
Min.
Typ.
Max.
Comment
T
RST#-USIM
200 ms
-
-
(U)SIM card turn-off time
T
RST#
250 ms
400 ms
600 ms
More than 600 ms will cause reset repeatedly