Quectel RM510Q-GL - Page 54

5G Module Series
RM510Q-GL Hardware Design
RM510Q-GL_Hardware_Design 53 / 88
The following figure shows a reference circuit of these four pins.
Host Module
CONFIG_0
CONFIG_1
CONFIG_2
CONFIG_3
GPIO
GPIO
GPIO
GPIO
21
69
75
1
VCC_IO_HOST
R1
10k
R2
10k
R3
10k
R4
10k
NM-0Ω
NM-0Ω
0Ω
NM-0Ω
Notes: The voltage level of VCC_IO_HOST could be 1.8 V or 3.3 V typically.
Figure 27: Recommended Circuit of Configuration Pins
69
CONFIG_1
DO
Connected to GND internally
-
75
CONFIG_2
DO
Not connected internally
-
1
CONFIG_3
DO
Not connected internally
-