RTL8169
2002/03/27 Rev.1.21
87
11.3.4 MII Timing
MII Timing – MII PORT - Transmit
TxCLK
TxD[3:0], TxEN
Vih(min)
Vih(min)
Vil(max)
Vil(max)
tTxCC
tTxCH
tTxCL
tTxRV tTxHT
MII Transmit Timing
10MHz 100MHz
Symbol Description Min
Typical
Max Min
Typical
Max Units
tTxCC Tx Clock Cycle 400 40 ns
tTxCH Tx Clock High Time 140 260 14 26 ns
tTxCL Tx Clock Low Time 140 260 14 26 ns
tTxRV Tx Clock rise to TxD, TxEN valid 20 20 ns
tTxHD TxD, TxEN Hold Time 5 5 ns
MII Transmit Timing Parameters
MII Timing – MII PORT - Receive
RxCLK
RxD[3:0], RxDV,
RxER
Vih(min)
Vih(min)
Vil(max)
Vil(max)
tRxCC
tRxCH
tRxCL
tRxSU tRxHT
MII Transmit Timing
10MHz 100MHz
Symbol Description Min
Typical
Max Min
Typical
Max Units
tRxCC Rx Clock Cycle 400 40 ns
tRxCH Rx Clock High Time 140 260 14 26 ns
tRxCL Rx Clock Low Time 140 260 14 26 ns
tRxSU RxD, RxDV, RxER Setup Time 10 20 10 20 ns
tRxHD RxD, RxDV, RxER Hold Time 5 5 ns
MII Transmit Timing Parameters