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RTL8169
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92 pages
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R
TL8169
2002/03/27
Rev
.1.21
92
Realtek Semiconductor Corp.
Headquarters
1F
, No. 2, Industry East Road IX, Science-based
Industrial Park, Hsinchu, 300, T
aiwan, R.O.C.
T
el : 886-3-578021
1 Fax : 886-3-5776047
WWW: www
.realtek.com.tw
91
Table of Contents
Main Page
Default Chapter
1
Table of Contents
1
1 Features
2
2 General Description
3
3 Block Diagram
4
4 Pin Assignments
5
5 Pin Description
6
Power Management/Isolation Interface
6
PCI Interface
7
Flash/Bootprom/Eeprom/MII Interface
9
LED Interface
10
Gmii, Tbi, Phy Cp
10
Clock and NC Pins
12
Power Pins
12
6 Register Descriptions
13
DTCCR: Dump Tally Counter Command
15
FLASH: Flash Memory Read/Write
16
ERSR: Early Rx Status
16
Command
17
Tppoll: Transmit Priority Polling
17
Interrupt Mask
18
Interrupt Status
19
Transmit Configuration
20
Receive Configuration
21
9346CR: 93C46 (93C56) Command
23
Config 0
23
Config 1
24
Config 2
25
Config 3
25
Config 4
26
Config 5
27
Multiple Interrupt Select
28
PHYAR: PHY Access
28
TBICSR: Ten Bit Interface Control and Status
28
TBI_ANAR: TBI Auto-Negotiation Advertisement
29
TBI_LPAR: TBI Auto-Negotiation Link Partner Ability
29
Phystatus: PHY(GMII or TBI) Status
30
RMS: Receive (Rx) Packet Maximum Size
30
C+CR: C+ Command
31
RDSAR: Receive Descriptor Start Address
31
Etthr: Early Transmit Threshold
31
Function Event
32
Function Event Mask
32
Function Preset State
33
Function Force Event
33
7 EEPROM (93C46 or 93C56) Contents
34
EEPROM Registers
35
EEPROM Power Management Registers
35
8 PCI Configuration Space Registers
36
PCI Bus Interface
36
Byte Ordering
36
Interrupt Control
36
Latency Timer
36
64-Bit Data Operation
37
64-Bit Addressing
37
Bus Operation
37
Target Read
37
Target Write
38
Master Read
38
Master Write
39
Configuration Access
40
Packet Buffering
40
Transmit Buffer Manager
40
Receive Buffer Manager
40
Packet Recognition
40
PCI Configuration Space Table
41
PCI Configuration Space Functions
42
Default Value after Power-On (RSTB Asserted)
46
Power Management Functions
47
Vital Product Data (VPD)
49
9 Functional Description
50
Transmit & Receive Operations
50
Transmit
50
Receive
55
Loopback Operation
58
Collision
58
Flow Control
58
Control Frame Transmission
58
Control Frame Reception
58
Memory Functions
59
Memory Read Line (MRL)
59
Memory Read Multiple (MRM)
59
Memory Write and Invalidate (MWI)
60
Dual Address Cycle (DAC)
60
LED Functions
61
Link Monitor
61
Rx LED
61
Tx LED
62
Tx/Rx LED
62
Link/Act Led
63
Physical Layer Interfaces
64
Media Independent Interface (MII)
64
Gigabit Media Independent Interface (GMII)
64
Ten Bit Interface (TBI)
64
MII/GMII Management Interface
64
10 Application Diagrams
65
10/100/1000Base-T Application
65
1000Base-X Application
65
11 Electrical Characteristics
66
Temperature Limit Ratings
66
DC Characteristics
66
AC Characteristics
67
FLASH/BOOT ROM Timing
67
Serial EEPROM Interface Timing
69
PCI Bus Operation Timing
70
MII Timing
87
GMII Timing
89
TBI Timing
90
12 Mechanical Dimensions
91
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