RL78/G13 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0146EJ0100 Rev.1.00 1018
Sep 22, 2011
Caution The pins mounted depend on the product. Refer to 2.1.1 20-pin products to 2.1.14 128-pin products,
and 2.1.15 Pins for each product (pins other than port pins).
UART mode bit width (during communication at different potential) (reference)
TxDq
RxDq
Baud rate error tolerance
Baud rate error tolerance
Low-bit width
High-/Low-bit width
High-bit width
1/Transfer rate
1/Transfer rate
Caution Select the TTL input buffer for the RxDq pin and the N-ch open drain output (VDD tolerance) mode for the
TxDq pin by using port input mode register g (PIMg) and port output mode register g (POMg).
Remarks 1. UART2 cannot communicate at different potentia when bit 1 (PIOR1) of peripheral I/O redirection register
(PIOR) is 1.
2. R
b[Ω]:Communication line (TxDq) pull-up resistance, Vb[V]: Communication line voltage
3. q: UART number (q = 0 to 3), g: PIM and POM number (g = 0, 1, 8, 14)
To Next Page
Loading...
Need help?
General
