RL78/G13 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0146EJ0100 Rev.1.00 1020
Sep 22, 2011
Caution The pins mounted depend on the product. Refer to 2.1.1 20-pin products to 2.1.14 128-pin products,
and 2.1.15 Pins for each product (pins other than port pins).
CSI mode connection diagram (during communication at different potential)
V
b
R
b
User's device
<Master>
SCKp
SOp
SCK
SI
SIp SO
V
b
R
b
RL78/G13
Notes 1. The value must also be 2/fCLK or more.
2. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.
3. When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
Caution Select the TTL input buffer for the SIp pin and the N-ch open drain output (V
DD tolerance) mode for the
SOp pin and SCKp pin by using port input mode register g (PIMg) and port output mode register g
(POMg).
Remarks 1. R
b[Ω]:Communication line (SCKp, SOp) pull-up resistance, Cb[F]: Communication line (SCKp, SOp) load
capacitance, V
b[V]: Communication line voltage
2. p: CSI number (p = 00), m: Unit number (m = 0), n: Channel number (n = 0),
g: PIM and POM number (g = 1)
3. V
IH and VIL below are observation points for the AC characteristics of the serial array unit when
communicating at different potentials in CSI mode.
4.0 V ≤ EV
DD0 ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V: VIH = 2.2 V, VIL = 0.8 V
2.7 V ≤ EV
DD0 < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V: VIH = 2.0 V, VIL = 0.5 V
4. f
MCK: Serial array unit operation clock frequency
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number,
n: Channel number (mn = 00)
5. This specification is valid only when CSI00’s peripheral I/O redirect function is not used.
<R>
<R>
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