RL78/G13 CHAPTER 6 TIMER ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 349
Sep 22, 2011
(9) Timer output enable register m (TOEm)
The TOEm register is used to enable or disable timer output of each channel.
Channel n for which timer output has been enabled becomes unable to rewrite the value of the TOmn bit of timer
output register m (TOm) described later by software, and the value reflecting the setting of the timer output function
through the count operation is output from the timer output pin (TOmn).
The TOEm register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of the TOEm register can be set with a 1-bit or 8-bit memory manipulation instruction with TOEmL.
Reset signal generation clears this register to 0000H.
Figure 6-14. Format of Timer Output Enable register m (TOEm)
Address: F01BAH, F01BBH (TOE0), F01FAH, F01FBH (TOE1) After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TOEm 0 0 0 0 0 0 0 0
TOE
m7
TOE
m6
TOE
m5
TOE
m4
TOE
m3
TOE
m2
TOE
m1
TOE
m0
TOE
mn
Timer output enable/disable of channel n
0
The TOmn operation stopped by count operation (timer channel output bit).
Writing to the TOmn bit is enabled.
The TOmn pin functions as data output, and it outputs the level set to the TOmn bit.
The output level of the TOmn pin can be manipulated by software.
1
The TOmn operation enabled by count operation (timer channel output bit).
Writing to the TOmn bit is disabled (writing is ignored).
The TOmn pin functions as timer output, and the TOEmn bit is set or reset depending on the timer
operation.
The TOmn pin outputs the square-wave or PWM depending on the timer operation.
Caution Be sure to clear bits 15 to 8 to “0”.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
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