Renesas RL78 - Port Initialization; CPU Clock Initialization

RL78/G11 UART Reception in STOP Mode Using Middle-speed On-chip Oscillator IAR
R01AN3634EJ0100 Rev.1.00 Page 29 of 85
Feb. 15, 2017
5.9.3 Port initialization
Figure5.6 shows the flowchart for port initialization.
Figure 5.6 Port Initialization
Note Refer to the initialization flowchart in the RL78/G13 Initialization (R01AN2575EJ) Application Note for details
on how to set unused ports.
Note When designing circuits, always make sure unused ports are properly processed and all electrical characteristics
are met. Also make sure each unused input-only port is connected to V
DD
or V
SS
through a resister.
5.9.4 CPU clock initialization
Figure5.7 shows the flowchart for CPU clock initialization.
Figure 5.7 CPU Clock Initialization