Renesas RL78 - Hardware Explanation; Hardware Structure Example

RL78/G11 UART Reception in STOP Mode Using Middle-speed On-chip Oscillator IAR
R01AN3634EJ0100 Rev.1.00 Page 5 of 85
Feb. 15, 2017
4. Hardware Explanation
4.1 Hardware Structure Example
Figure 4.1shows the hardware used in this application note.
Figure 4.1 Hardware Configuration
Note: 1 This simplified circuit diagram was created to show an overview of connections only.
When actually designing your circuit, make sure the design includes sufficient pin processing and meets
electrical characteristic requirements.
(Connect each input-only port to V
DD
or V
SS
through a resistor.)
2 If a pin name starts with EVSS, connect the pin to V
SS
, if it starts with EVDD, connect it to V
DD
.
3 Make V
DD
higher than the RESET release voltage (V
LVD
) set in LVD.
RESET
V
DD
RL78/G11
V
DD
V
SS
REGC
For on-chip debugging
P55/RxD0/INTP11
P40/TOOL0
P31
P30/TO01
P00/TI03
LED1
P33
V
DD
LED2
V
DD
V
DD
External
target device