Renesas RL78 - UART0 Operation Start Function

RL78/G11 UART Reception in STOP Mode Using Middle-speed On-chip Oscillator IAR
R01AN3634EJ0100 Rev.1.00 Page 64 of 85
Feb. 15, 2017
5.9.11 UART0 operation start function
Figure5.15 shows the flowchart for the UART0 operation start function.
R_UART0_Start
return
Clear UART0 reception comp le tion/reception
error interrupt request flag
Enable UART0 operation
Enable UART0 reception completion/reception
error interrupt request
SS0 register
SS01 bit ← 1 : Shift to communication wait state
IF0H register
SRIF0 bit ← 0 : Interrupt request signal is not generated
SREIF0 bit ← 0 : Interrupt request signal is not generated
MK0H regi ster
SRMK0 bit ← 0 : Inte rru pt processin g enabled
SREMK0 bit ← 0 : Inte rru pt processin g enabl ed
Figure 5.15 UART0 Operation Start Function
・Serial channel start register 0 (SS0）
Enable communication wait state.
UART0 O
p
eration Enable
Symbol: SS0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 SS0
1
SS0
0
x x x x x x x x x x x x x x 1 x
Bit 1
SS0
1
Trigger to start operations for channel n
0 No trigger operation
1 SEmn bit is set to 1 and goes to communication wait state.