Renesas RL78 - Software Explanation; Operation Outline

RL78/G11 UART Reception in STOP Mode Using Middle-speed On-chip Oscillator IAR
R01AN3634EJ0100 Rev.1.00 Page 7 of 85
Feb. 15, 2017
5. Software Explanation
5.1 Operation Outline
This sample code receives UART data while the device is in the wait state with STOP mode. STOP mode is released
when the INTP (external interrupt) pin detects the start bit. Operations return from STOP mode and UART data is
received simultaneously. The middle-speed on-chip oscillator does not provide frequency accurate enough for UART
communications and baud rate corrections are necessary. A detailed description on how to correct the baud rate is
provided in the following document: “RL78/G11 UART communication with middle speed on chip oscillator IAR
(R01AN3621EJ).”
LEDs are controlled to indicate whether the UART receive data is normal or abnormal.
Table 5.1 shows the correspondence of receive data and the LED state.
Table 5.1 Correspondence of Receive Data and Corresponding LED State
UART Receive Data LED
Normal data During pin input edge detection interrupt:
LED1/2: On
After UART0 reception is complete
LED1/2: Off
Abnormal data
(Framing error)
LED1: Blinking
LED2: Off
Abnormal data
(Parity error)
LED1: Off
LED2: Blinking
Abnormal data
(Overrun error)
LED1: Blinking
LED2: Blinking
(1) Port initialization
Set P31 and P33 to High output to turn off LED1 and LED2.
(2) SAU initialization
<Setting conditions>
 SAU0 channel 0: use as UART
 Data input pin: P55/RxD0
 Data length: 8-bit
 Data transfer direction setting: LSB first
 Parity setting: even
 Receive data level setting: standard
 Baud rate: 9600bps
 Reception complete interrupt (INSTR0), error interrupt (INTSRE0): enabled
 Interrupt priority level of INTSR0, INTST0, INTSRE0: low (level 3)