Renesas RL78 - Page 45

RL78/G11 UART Reception in STOP Mode Using Middle-speed On-chip Oscillator IAR
R01AN3634EJ0100 Rev.1.00 Page 45 of 85
Feb. 15, 2017
TAU0 TI03 Pin Noise Filter Disable
・Noise filter enable register 1 (NFEN1)
Set noise filter to OFF.
Symbol: NFEN1
7 6 5 4 3 2 1 0
0 0 0 0 TNFEN03 TNFEN02 TNFEN01 TNFEN00
x x x x 0 x x x
Bit 3
TNFEN03 Enable/disable use of noise filter for TI03 pin input signal
0 Noise filter OFF
1 Noise filter ON
 Port output mode register (POM3)
Set to normal mode.
 Port mode control register (PMC3/PMC0)
Set to digital input/output.
 Port register (P3)
Set to low level.
 Port mode register (PM3/PM0)
Set PM30 to output mode and PM00 to input mode
TAU0 P00/P30 Settings
Symbol: POM3
7 6 5 4 3 2 1 0
0 0 0 0
POM33 POM32 POM31 POM30
x x x x x x x
0
Bit 0
POM30 Selection of Pmn pin output mode (m = 0, 2-5; n = 0-6)
0 Normal output mode
1 N-ch open drain output (V
DD
withstand voltage)
Symbol: PMC0
7 6 5 4 3 2 1 0
1 1 1 1 1 1
PMC01 PMC00
x x x x x x x
0
Bit 0
PMC00 Selection of Pmn pin digital input/output or analog input (m = 0-3; n = 0-7)
0 Digital input/output (alternate function other than analog input)
1 Analog input