Rohde & Schwarz SMU200A - Test Assembly for Settling Time with Fast Hopp Bus

Test Assemblies R&S SMU200A
1007.9845.82 1.6
E-12
Test Assembly for Settling Time with Fast Hopp Bus
Note: R&S SMATE only
Test equipment - Spectrum analyzer (Table 1-2, item 24)
- Pulse generator (Table 1-2, item 17)
- FHOP-Bus generator (Table 1-2, item 29)
Test setup
RF analyzer
Pulse generator
10 MHz ref.
RF
DUT
Trigger pulse
Fast hop bus
The Fast Hop control signals (clock, strobe and data) are supplied via the serial FHOP bus on the Digital I/O
interface at the rear of the instrument. Data transmission starts with the MSB (most significant bit). A strobe
marks the LSB (least significant bit) and thus the end of a valid data sequence (40 bits). The data bits
determine the RF path, the Fast Hop mode (direct or not) and the processed list index.
fhop_clk
fhop_strb
fhop_data
...
FHOP bus
Bit
39
Bit
38
Bit
37
Bit
36
Bit
35
Bit
34
Bit
33
Bit
32
Bit
31
Bit
30
Bit
29
Bit
28
Bit
1
Bit
0
fhop_data
...
...
fhop_path fhop_cmd
fhop_imm_n
F
ig. 1-1 Input control signals for List Modes Fast Hop and Fast Hop Direct on the serial FHOP bus of the
Digital I/O interface.