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Control Port Functions
System Control I/O Port Functions (PW392, IC301)
PIN PORT NAME DESCRIPTION I/O
347 D26 5V_SW_EX 5.0V Power On/Off Control [H: On, L: Off ] O
348 D27 3.3V_SW_EX 3.3V Power On/Off control [H: On, L: Off] O
251 D28 15V_SW_EX 15V Power On/Off Control [H: On, L: Off ] O
146 D29 FAN_SW_1EX Fan Control SW1 [H: On, L: Off] O
33 D30 FAN_SW_2EX Fan Control SW2 [H: On, L: Off ] O
250 C28 1.8_SW_EX 1.8V Power On/Off Control [H: On, L: Off] O
145 C29 LAMP_DC_ON_EX Ballast Power Control SW [H: On, L: Off ] O
32 C30 BALAST_AC_EX Lamp Control SW [H: On, L: Off ] O
253 F28 XSTDBYEN TE7783 Standby Mode H: Fixed O
148 F29 NCONFIG O
35 F30 NSTATUS I
438 E26 FILTER_LED FILTER_LED [H: On, L: Off ] O
349 E27 POWER_LED POWER_LED [H: On, L: Off ] O
252 E28 READY_LED READY_LED [H: On, L: Off ] O
147 E29 TEMP_LED WARNING_TEMP_LED [H: On, L: Off ] O
34 E30 LAMP_LED LAMP_REPLACE_LED [H: On, L: Off ] O
37 H30 FPGA_K1 O
440 G26 PW_SCS 3Wire Select O
351 G27 PW_SDATA_OUT 3Wire Data O
254 G28 GAMMA_RESET Digital Gamma IC Reset [ H: Reset] O
149 G29 SERIAL_EN O
36 G30 CONF_DONE FPGA Configuratrion End [H: End] I
439 F26 MUTE MUTE [H: Mute On, L: Off ] O
350 F27 XRST TE7783 (I/O EXP.) Reset O
339 D18 WATCHDOG_EN IC861 Output Enable O
19 A19
134 B19 SIPD Sil169 Power Down [L: Power Down] O
241 C19 IN0_HDET BA7078AFP H-Sync Detect [H: H-Sync Exist, L: No] I
340 D19 IN1_VDET BA7078AFP V-Sync Detect [H:V-Sync Exist, L: No] I
30 A20 PW_SDA3 IIC Bus SDA3 I/O
135 B20 PW_SCL3 IIC Bus SCL3 I/O
306 AB3 LENS_UD_SW Lens Up/Down Switch I/O
144 B29 IN1R[2] Red Pixel Input
29 A29 IN1R[3] Red Pixel Input
143 B28 IN1R[4] Red Pixel Input
249 C27 IN1R[5] Red Pixel Input
28 A28 IN1R[6] Red Pixel Input
142 B27 IN1R[7] Red Pixel Input
27 A27 IN1R[8] Red Pixel Input
248 C26 IN1R[9] Red Pixel Input
437 E25 IN1G[2] Green Pixel Input
346 D25 IN1G[3] Green Pixel Input
247 C25 IN1G[4] Green Pixel Input
140 B25 IN1G[5] Green Pixel Input
25 A25 IN1G[6] Green Pixel Input
345 D24 IN1G[7] Green Pixel Input
246 C24 IN1G[8] Green Pixel Input
139 B24 IN1G[9] Green Pixel Input
245 C23 IN1B[2] Blue Pixel Input
138 B23 IN1B[3] Blue Pixel Input
23 A23 IN1B[4] Blue Pixel Input
343 D22 IN1B[5] Blue Pixel Input
244 C22 IN1B[6] Blue Pixel Input
137 B22 IN1B[7] Blue Pixel Input
22 A22 IN1B[8] Blue Pixel Input
342 D21 IN1B[9] Blue Pixel Input
386 AG12 RXD_PW UART RXD I
291 AH12 TXD_PW UART TXD O
355 L27 PW_SCL0 IIC Bus SCL0 I/O
444 L26 PW_SDA0 IIC Bus SDA0 I/O
153 L29 PW_SCL1 IIC Bus SCL1 I/O
258 L28 PW_SDA1 IIC Bus SDA1 I/O
41 M30 PW_SCL2 IIC Bus SCL2 I/O
154 M29 PW_SDA2 IIC Bus SDA2 I/O
293 AH10 PW_R/C_REAR Remote Control Input (Rear) I
40 L30 Zoom+ Zoom+ [H: Active, L: Stop] O
443 K26 Focus- Focus- [H: Active, L: Stop] O
354 K27 PW_PWM2 FPGA Clock O
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