Sharp MZ-800 Technical Reference And User's Guide

Pin
Signal
name
1/0
Functional description Note
No.
1
CPU
0
CPU clock (3.547 MHz)
2
5V
-
Power supply
3
GND
-
,Ground
4
ADO
I
I
I
CPU address bus
19
ADF
20
DTO
I
I
1/0 CPU data bus
27
on
28
GND
-
Ground
29
vcc
-
Power supply
'
30
MREO I CPU MREO signal Negative logic
31 RD I
CPU RD signal Negative logic
32
WR I CPU WR signal Negative logic
33
RFSH I
CPU RFSH signal
Negative logic
34
IORO
I
CPU lOAQ signal Negative logic
35
M1 I
CPU
M1 signal
Negative logic
36
SEL1
0
System RAM address multiplexer select signal
37 CASB
0
System RAM column address strobe signal
38
INH5
0
Inhibit bank (OUT $E5) select signal ("H" - Inhibit).
OPEN
39
VBLN
0
Vertical blanking signal
Negative logic
40
GND
-
41 VRAS 0
VRAM RAS control signal Negative logic
42
VCAS 0
VRAM CAS control signal Negative logic
43
VADO
I
I
0
VRAM address signal (multiplexer output)
50
VAD7
51 WE 0
VRAM output enable Negative logic
52
vcc
-
Power supply
53
GND
-
Ground
54
VRWR
0
VRAM write signal
Negative logic
55
VAO
I I
1/0
VRAM data bus (standard RAM)
62
VA7
63
vco
I
I
1/0
VRAM data bus (option RAM)
70
VC7
71 SBCR 0
Calor sub-carrier wave
72
RED
0
Video signal, red
73
BLUE
0
Video signal, blue
74
GREN
0
Video signal, green
75
V
ITN
0
Brightness control signal
76
VSYN 0
Vertical sync signal
Negative logic
77
HSYN
0
Horizontal sync signal
Negative logic
78
GND
-
79
vcc
-
80
CLKO I
Clock
input (17.7344 MHz)
81
CROM 0
ROM chip enable
Negative logic
82
KEY
0
8255 chip enable
Negative logic
83
NTPL
I
NTSC/PAL selection (PAL - "L") GND
84
TEST I
Test pin ("H" - test mode) GND
85
MOD7 I
MZ-700/800
mode selection ("L" = MZ-700 model
86
IOWA 0
Sum of CS and WR of 1/0 controlled by the custom IC
Negative logic
87 lORD
0
Sum of CS and RD of 1/0 controlled by the custom IC
Negative logic
88
CRS 0
1/0 $BO - $B3 chip enable
OPEN
89
SIO 0
1/0 $F4- $F7 chip enable
OPEN
90
RSro 0
Reset output
Negative logic
91
MNRT I
Manual reset input
Negative logic
92
PORT I
Power on reset input
Negative logic
93
WTGD
0
Wait signal to CPU
Open drain
94
""JOY
0
Joystick chip enable
Negative
logic
95
CPR 0
PlO chip select
Negative logic
96
PSG 0
76489 chip select
Negative
logic
97
CKMS 0
8253 musical interval clock
98
53G
0
8253 musical interval ON/OFF gate signal
99
C53 0
8253 chip enable
Negative logic
100
TEMP I
MZ-700
mode, $E800 tempo input
*Term "OPEN" represents the signal not used on the board.
7

Sharp MZ-800 Specifications

General

Brand	Sharp
Model	MZ-800
Category	Desktop
Language	English