SOLTEK SL-52D2 - Page 35

Award BIOS Setup 29
DRAM RAS#
Precharge Time
Use the default setting. This option
allows you to determine the number
of the CPU clocks allocated for the
RAS to accumulate/charge it before
the DRAM is refreshed.
DRAM R/W
Leadoff Timing
Default is 6.
Fast RAS To CAS
Delay
Use the default setting. This setup
option allows you to determine the
delay time in completing the
transition from RAS to CAS.
DRAM Read Burst
DRAM Write Burst
Timing
(EDO/FPM)
Use the default setting. Burst
read/write requests are generated
by the CPU in four separate parts.
The 1st part provides the location
within the DRAM where the read or
write is to take place while the
remaining three parts provide the
actual data. The lower the timing
number is, the faster the system
memory will be addressed.
Fast MA to RAS#
Delay CLK
Default is 1.
Fast EDO Path
Select
Choose Enabled or Disabled
(default).
Refresh RAS#
Assertion
Default is 5 Clks.
ISA Bus Clock Default is PCICLK/4.
System BIOS
Cacheable
Choose Enabled or Disabled
(default).
Video BIOS
Cacheable
Choose Enabled or Disabled
(default).