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Sony HCD-CBX3 - Page 50

Sony HCD-CBX3
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50
HCD-BX5BT/CBX1/CBX3
Pin No.
Pin Name I/O Description
44
TEST I Setting terminal for test mode Normally fixed at "L"
45 IRQ I
Interrupt request signal input terminal Not used
46
AoUT3 (PO4) O Request signal output to the USB controller (CBX3)
47
AoUT2 (PO5) O Audio data output terminal Not used
48
PIO0 O
Request signal output to the system controller and USB controller (CBX3)
Request signal output to the system controller (BX5BT/CBX1)
49, 50
PIO1, PIO2 O Not used
51
PIO3 I Gate signal input from the USB controller (CBX3)
52
VSS1 - Ground terminal
53
VDDT3 - Power supply terminal (+3.3 V)
54
SBSY O Subcode block sync signal output to the system controller
55
SBOK/FOK O Not used
56
IPF O Not used
57
SFSY/LOCK O Not used
58
ZDET O Zero detection signal output terminal Not used
59
GPIN I Not used
60
MS I Microcomputer interface mode selection signal input terminal Fixed at "H" in this set
61
DOUT (PO6) O Digital audio data output terminal Not used
62
AOUT (PO7) O Audio data output terminal Not used
63 BCK (PO8) O
Bit clock signal output terminal Not used
64
LRCK (PO9)
O
L/R sampling clock signal output terminal Not used
65
AIN (PI4) I Digital audio data input from USB controller (CBX3)
66
BCKi (PI5) I Bit clock signal input from the USB controller (CBX3)
67
LRCKi (PI6) I L/R sampling clock signal input from the USB controller (CBX3)
68
VDD1 - Power supply terminal (+1.5 V)
69
VSS - Ground terminal
70
AWRC - Not used
71
PVDD3 - Power supply terminal (+3.3 V)
72
PDO O Phase error margin signal between EFM signal and PLCK signal output terminal
73
TMAXS O TMAX detection signal output terminal Not used
74
TMAX O TMAX detection signal output terminal
75 LPFN I
Inverted signal input from the operation amplifier for PLL loop filter
76 LPFo O
Signal output from the operation amplifier for PLL loop filter
77 PVREF I
Reference voltage (+1.65V) input terminal
78 VCOF O
VCO filter output terminal
79
PVSS3 - Ground terminal
80
SLCo O EFM slice level output terminal
81
RFi
I
RF signal input terminal
82
RFRPi
I
RF ripple signal input terminal
83
RFEQo O EFM slice level output terminal
84
VRo O Reference voltage (+1.65V) output terminal
85
RESiN O External resistor connection terminal
86
VMDiR O Reference voltage (+1.65V) output terminal for automatic power control circuit
87
TESTR O Low-pass filter terminal for RFEQO offset correction
88
AGCi
I
RF signal amplitude adjustment amplification input terminal
89
RFo O RF signal generation amplification output terminal
90
RVDD3 - Power supply terminal (+3.3 V)

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