Sony HCD-FLX5D - Page 86

HCD-FLX5D/FLX7D
8686
– MB Board –
IC203 BR9040F-WE2
8 7 6 5
1 2 3 4
DI
DO
GND
WC
SK
CS
VCC
R/B
COMMAND DECODE
CONTROL CLOCK
GENERATION
POWER
SUPPLY
VOLTAGE
DETECTOR
HIGH VOLTAGE
GENERATOR
WRITE
DISABLE
COMMAND
REGISTER
ADDRESS
BUFFER
DATA
REGISTER
ADDRESS
DECODER
R/W
AMP
4096bit
EEPROM ARRAY
8bit
16bit
16bit
8bit
IC215 SN74ALVCH16841DGGR
1
1OE
56
1LELE
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
LATCH
LATCH
28
2OE
29
2LE
OE
LE
OE
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
1D9
1D10
2D1
2D2
2D3
GND
2D4
2D5
2D6
VCC
2D7
2D8
GND
2D9
2D10
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
1Q9
1Q10
2Q1
2Q2
2Q3
GND
2Q4
2Q5
2Q6
VCC
2Q7
2Q8
GND
2Q9
2Q10
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
• IC Block Diagrams
– RF Board –
IC001 SP3723CAF0PM
MUX ATT
INPUT
BIAS
AGC
GCA
PROGRAMMABLE
EQUALIZER
FILTER
DIFFERENTIATOR
64 63 62 61 60 59 58 57 5156
1
2
FULL WAVE
RECTIFER
AGC CHARGE
PUMP
+
–
+
–
+
+
+
+
+
+
+
+
+
+
––
+
–
+
–
INPUT
SEL
ATT
2
4
2
2
INPUT
IMPEDANCE
SEL
OFFSET
CANSEL
MNTR
CONTROL
SERIAL
PORT
REGISTER
4
FROM
S-PORT
4
FROM
S-PORT
INPUT
IMPEDANCE
SEL
3
FROM
S-PORT
CLAMP &
ENVELOPE
LEVEL
DAC
SIGDET
AGCO
BUFFER
55 54 53 52 50 49
OUTPUT
INHIBIT
FROM S-PORT
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
GCA
CD/DVD
4
FROM
S-PORT
3
FROM
S-PORT
MUX
3
FROM
S-PORT
GCA
3
FROM
S-PORT
3
FROM
S-PORT
EQ
VC
COMPARATOR
PHASE
DETECTOR
PHASE
DETECTOR
A+D
B+D
+
+
A+C
B+C
GCA
W/LPF
SUM
AMP
18 19 20 21 22 24 2523 26 27 28 29 31 3230
GCA
GCA
VCI FOR SERVO INPUT
VC = VPB/2
DUAL APC
LD H/L
FROM S-PORT
APC SEL
DVD/CD
TOPHOLD
GCA
TOPHOLD
GCA
41
48
47
46
45
GCA
OFFSET
CANSEL
5
FROM
S-PORT
GCA
40
GCA
OFFSET
CANSEL
6
FROM
S-PORT
3
FROM
S-PORT
GCAGCA
CEFDB
CP/CN
LOW
IMPEDANCE
CD/DVD
SUBGCAMUX GCALPF
GCALPF
39
38
37
36
OFFSET
CANSEL
PEAK/BOTTOM
HOLD
BOTTOM
ENVELOPE
INPUT
BUFFER
5
FROM
S-PORT
GCALPF
V25/2
TE
RST
35
34
33
FOR SERVO
OUTPUT
PH
TOP
HOLD
GCASEL
LINKEN
MUX
HOLDEN
+
–
+
–
COMPA-
RATOR
INTERNAL
FDGHG
HYSTERESISTER
& OFFSET
FROM S-PORT
MIRR
COMPARATOR
INPUT GAIN
FROM S-PORT
SEL
DAC
SINK CURRENT
FROM S-PORT
2
AGCO
FAST ATTACK
AGC
HOLD
BCA
DET
2
FROM
S-PORT
PH
2
2
INPUT
IMPEDANCE
FROM S-PORT
44
43
42
V33 FOR
OUTPUT
BUFFER
PI
FE
TE
CE
V25
V125
V25/3
LPF ATT
POL SEL
BUFFER
CONTROL
SIGNALS
TO EACH
BLOCK
3
CE ATT
CEPOL
D
C
B
A
CD F
CD E
VPB
VC
DVDLD
CDLD
CDPD
DVDPD
LDON
VNB
MIRR
MP MB
MIN
MEVO
MLPF
CE
SDEN
SDATA
SCLK
V33
FE
TE
PI
V25
V125
TPH
DFT
LINK
LCP
LCN
MNTR
DVDRFP
DVDRFN
A2
B2
C2
D2
CP
CN
D
C
B
A
CD D
CD C
CD B
CD A
RFDC RFSIN ATOP ATON AIN AIP VPA RFAC VNA BYP DIN DIP FNP FNN MEV RX
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