Sony MDS-M9 - IC121 Digital Signal Processor, Digital Servo Processor, EFM;ACIRC Encoder;Decoder (CXD2535 BR)

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I/O
Function
• IC121 Digital signal processor, digital servo processor, EFM/ACIRC encoder/decoder (CXD2535BR)
Pin No. Pin Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
FS256
FOK
DFCT
SHCK
SHCKEN
WRPWR
DIRC
SWDT
SCLK
XLAT
SRDT
SENS
ADSY
SQSY
DQSY
XRST
TEST4
CLVSCK
TEST5
DOUT
DIN
FMCK
ADER
REC
DVSS
DOVF
DODT
DIDT
DTI
DTO
C2PO
BCK
LRCK
XTAO
XTAI
MCLK
XBCK
DVDD
WDCK
RFCK
11.2896 MHz clock output (MCLK). Not used in this unit (Opened)
Output of FOK signal to system controller (IC201)
Outputs “H” when focus is set
Outputs defect ON/OFF switching signal to CXD2536R (IC271)
Outputs track jump detection signal to system controller (IC201)
Track jump detection enable input. Not used in this unit. (Fixed at “H”)
Inputs laser power switching signal from system controller (IC201)
Not used in this unit. (Fixed at “H”)
Inputs write data signal from system controller (IC201)
Inputs serial clock signal from system controller (IC201)
Inputs serial latch signal from system controller (IC201)
Outputs write data signal to system controller (IC201)
Outputs internal status (SENSE) to system controller (IC201)
ADIP sync signal output. Not used in this unit (Opened)
Output subcode Q sync (SCOR) to system controller (IC201)
Outputs “L” every 13.3 msec. Outputs “H” at all most mostly
Outputs digital-in U-bit CD format subcode Q sync (SCOR) to system controller (IC201).
Outputs “L” every 13.3 msec Outputs “H” at all most mostly
Inputs reset signal from system controller (IC201). Reset: “L”
Test input (Fixed at “L”)
Not used in this unit (Opened)
Test input (Fixed at “L”)
Digital audio signal output pin (For optical output) Not used in this unit
Digital audio signal input pin (For optical input)
ADIP FM demodulation clock signal output
ADIP CRC flag output. “H”:Error
Input of recording/playback switching signal from system controller (IC201)
Recording: “H”. Playback: “L”
Ground pin (Digital)
Digital audio output validity flag input pin. (Fixed at “L”)
Input pin of 16bit data for digital audio output from CXD2536R (IC271)
Output pin of 16bit data for digital audio input to CXD2536R (IC271)
Input pin of recording audio data signal from CXD2536R (IC271)
Output pin of playback audio data signal to CXD2536R (IC271)
Outputs C2PO signal to CXD2536R (IC271). (Output indicating data error status)
Playback: C2PO (“H”). Digital recording: D.In-Vflag. Analog recording: “L”
Outputs bit clock signal (2.8224 MHz) to CXD2536R (IC271) (MCLK)
Outputs L/R clock signal (44.1 kHz) to CXD2536R (IC271) (MCLK)
System clock (512 fs=22.5792 MHz) signal output. Not used in this unit (Opened)
Input of system clock (512fs=22.5792 MHz) signal input from CXD2536R (IC271)
MCLK clock (22.5792 MHz) signal output
Pin 32 (BCK) inversion output
Power supply pin (+5V) (Digital)
WDCK clock (88.2 kHz) signal output (MCL)
RFCK clock (7.35 kHz) signal output (MCLK)
O
O
O
O
I
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I
I
I
O
O (3)
O
O
O
I
I
O
I
O
I
O
O
I
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I
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O
I
O (3)
O
O
O
O
I
O
O
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O
O