Sony SS-CEP50 - Block Diagram - MAIN Section

HCD-EP50
1717
• SIGNAL PATH
: RECORD
: TAPE PLAY
: CD PLAY
: TUNER
I2CDATA
INPINENA
SYSTEM CONTROLLER
IC301 (2/3)
EEPROM
IC302
CDDATA
CDCLK
CDRESET
L3
L4
F
(Page 16)
RL-CH
TL-CH
RR-CH
TR-CH
DI CE
X2
X1
X301
4.194304MHz
7
3
I2CCLK
5
8
CD DOOR SW
19
45
MUTE
49
15
CL
14
LT4
516
12
3
42
16
43
CE
GENERALDOUT
GENERALCLK
47
1
2
GENERALDIN
100
PLLENA
48
SDA
5
SCL
6
10
9
L2
L1
LTOUT
2
11
B
(Page 15)
L
R
1
LVROUTLVRIN
30
RVROUT
R-CH
R-CH
R-CH
CD-L-IN
CD-R-IN
CD BLOCK
INPUT SELECT SWITCH,
ELECTRICAL VOLUME
U6
R-CH
LINE AMP
U3
SOUND
CONTROL
CIRCUIT
R-CH
R-CH
MEGA BASS
CONTROL SWITCH
Q13
R-CH
PHONES
CN17
CD DO
CD CLK
CD \RESET
+
+
–
–
INPUT SELECT
SWITCH
SELECT SWITCH
SWITCH
LTCOM
4
LT3
6
LT2
7
LT1
8
+9V
R-CH
R-CH
H
(Page 16)
E
(Page 15)
TU-R
TU-L
CLOCK
DA IN
DA IN
CLOCK
DA OUT
STEREO
4
STEREO
TUNED
34
STATION
PLL CE
R-CH
D23
D17
D20
JK401
Z PUSH
OPEN/CLOSE
SW300
HEADPHONE
AMP
U9
MUTING
Q7
MUTING
Q21
SPEAKER
IMPEDANCE
USE 8Ω
POWER AMP
U11
6-3. BLOCK DIAGRAM – MAIN Section –