ST STM32F405 Series Programming Manual

Flash memory interface PM0059
26/29 DocID15687 Rev 5
2.8.7 Flash interface register map
Table 10. Flash register map and reset values
Offset Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0
0x00
FLASH_ACR
Reserved
DCRST
ICRST
DCEN
ICEN
PRFTEN
Reserved
LATENC
Y
Reset value 00000 00 0
0x04
FLASH_KEY
R
KEY[31:16] KEY[15:0]
Reset value 00000000000000000000000000000000
0x08
FLASH_OPT
KEYR
OPTKEYR[31:16] OPTKEYR[15:0]
Reset value 00000000000000000000000000000000
0x0C
FLASH_SR
Reserved
BSY
Reserved
PGSERR PGPERR PGAERR
WRPERR
Rese
rved
OPERR
EOP
Reset value 0 0000 0 0
0x10
FLASH_CR
LOCK
Reserved
EOPIE
Reserved
STRT
Reserved
PSIZ
E[1:0
]
Reserved
SNB[3:0]
MER
SER
PG
Reset value 1 0 0 00 0000 00
0x14
FLASH_OPT
CR
Reserved
nWRP[11:0] RDP[7:0]
nRST_STDBY
nRST_STOP
WDG_SW
Reserved
BOR_LEV
OPTSTRT
OPTLOCK
Reset value 11111111111110101010111 1101

ST STM32F405 Series Specifications

General

Brand	ST
Model	STM32F405 Series
Category	Motherboard
Language	English