ST STM32F405 Series User Manual

AN4488 Rev 7 17/50
AN4488 Reset and power supply supervisor
49
Figure 8. PDR_ON timings example (not to scale, (not needed for STM32F410xx,
STM32F411xx, STM32F412xx, STM32F413xx, STM32F423xx, STM32F446xx,
STM32F469xx and STM32F479xx)
Selection of PDR_ON voltage supervisor
Voltage supervisor should have the following characteristics
• Reset output active-high push-pull (output driving high when voltage is below trip
point)
• Supervisor trip point including tolerances and hysteresis should fit the expected V
DD
range.
Notice that supervisor spec usually specify trip point for falling supply, so hysteresis
should be added to check the power on phase.
Example:
– Voltage regulator 1.8V +/- 5% mean V
DD
min1.71V
– Supervisor specified at 1.66V +/- 2.5% with an hysteresis of 0.5% mean
- rising trip max = 1.71V (1.66V + 2.5% + 0.5%)
- falling trip min = 1.62V (1.66V - 2.5%).
3.2.2 Power on reset (POR) / power down reset (PDR)
The device has an integrated POR/PDR circuitry that allows proper operation starting from
1.8
V.
The device remains in the Reset mode as long as V
DD
is below a specified threshold,
V
POR/PDR
, without the need for an external reset circuit. For more details concerning the
2SHUDWLRQ 3RZHU'RZQSKDVH3RZHU2QSKDVH
069
9''
WLPH
9
9''GXULQJRSHUDWLRQNHSWDERYH9
3'5B21
WLPH
1567
1567.HSWORZE\
LQWHUQDOFLUFXLWU\
9
9
,/
9
,+
3'5B21PXVW
JRDERYH9
9''
5HVHWE\
LQWHUQDO
VRXUFHV
1567IRUFHGORZE\H[WHUQDO
DQGLQWHUQDOFLUFXLWU\
VXSHUYLVRU
ORZWULSSRLQW
VXSHUYLVRU
KLJKWULSSRLQW
1567.HSWORZE\
H[WHUQDOVXSHUYLVRU
7
VXSHUYLVRU
7
5677(032
7
VXSHUYLVRU!
7
5677(032
7
5677(032
7
VXSHUYLVRU

ST STM32F405 Series Specifications

General

Brand	ST
Model	STM32F405 Series
Category	Motherboard
Language	English