ST STM32H723ZG

5.1 Boot mode selection ...........................................................26
5.2 Boot pin connection ...........................................................27
5.3 System bootloader mode .......................................................27
6 Debug management ..............................................................28
6.1 Introduction ..................................................................28
6.2 SWJ debug port (serial wire and JTAG) ...........................................28
6.2.1 TPIU trace port .........................................................28
6.2.2 External debug trigger....................................................28
6.3 Pinout and debug port pins .....................................................29
6.3.1 SWJ debug port pins.....................................................29
6.3.2 Flexible SWJ-DP pin assignment ...........................................29
6.3.3 Internal pull-up and pull-down on JTAG pins ...................................30
6.3.4 SWJ debug port connection with standard JTAG connector .......................30
7 Recommendations................................................................31
7.1 Printed circuit board ...........................................................31
7.2 Component position ...........................................................31
7.3 Ground and power supply (VSS,VDD) ............................................31
7.4 Decoupling ...................................................................31
7.5 Other signals .................................................................32
7.6 Unused I/Os and features ......................................................32
8 Reference design .................................................................33
8.1 Description ...................................................................33
9 Recommended PCB routing guidelines for STM32H723/733, STM32H725/735 and
STM32H730 microcontrollers .....................................................34
9.1 PCB stack-up.................................................................34
9.2 Crystal oscillator ..............................................................35
9.3 Power supply decoupling .......................................................35
9.4 High speed signal layout .......................................................36
9.4.1 SDMMC bus interface ....................................................36
9.4.2 Flexible memory controller (FMC) interface....................................37
9.4.3 Octo-SPI interface.......................................................38
AN5419
Contents
AN5419 - Rev 2
page 46/50