Supermicro SUPERO X10DRW-i - Page 13

Chapter 1: Overview
1-5
X10DRW-i(T) Jumpers
Jumper
Description Default Setting
JBT1
Clear CMOS See Chapter 3
JI
2
C1/JI
2
C2
SMB to PCI-E slots Pins 2-3 (Disabled)
JPB1 BMC Enable Pins 1-2 (Enabled)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1 GLAN1/GLAN2 Enable (X10DRW-i)
10G_LAN1/10G_LAN2 Enable (X10DRW-iT)
Pins 1-2 (Enabled)
JPME2 Manufacture (ME) Mode Select Pins 1-2 (Normal)
JWD1 Watch-Dog Timer Enable Pins 1-2 (Reset)
X10DRW-i(T) Connectors
Connectors Description
AOM Slot (J35) PCI-E 3.0 x16 Add-On-Module (AOM) slot for the mezza-
nine HBA card (Note 1 on Page 1-6)
Battery (JBAT1) Onboard CMOS Battery (See Chpt. 3 for used battery dis-
posal)
COM1 Backplane COM port
Fan1-4, FanA/B CPU/System fan headers (Fan1-Fan4), PCH/Peripheral
fan headers (FanA-FanB)
JF1 Front_Panel_Control header
JIPMB1 4-pin external BMC I
2
C header (for IPMI-card support)
JL1 Chassis Intrusion
JPI
2
C1 Power supply SMBbus I
2
C header
JPWR1 24-pin ATX main power connector
JPWR2/3 12V 8-Pin power connectors
JSTBY1 Standby power connector
JTPM1 TPM (Trusted Platform Module)/Port 80 header
LAN1/LAN2 G-bit Ethernet (GLAN) ports 1/2 (for X10DRW-i)
10G-bit Ethernet (GLAN) ports 1/2 (for X10DRW-iT)
(IPMI)_LAN IPMI_Dedicated LAN support by the Aspeed controller
(I-)SATA 0-5 Intel SATA 3.0 connectors (0-5) from Intel PCH
(S)-SATA0-3 SATA 3.0 connectors (0-3) from Intel SCU
I-SGPIO1/2 Seria_Link General-Purpose I/O (SGPIO) headers for I-
SATA 3.0 connections (I-SGPIO1 for I-SATA0-3, I-SGPIO2
for I-SATA4/5)
S-SGPIO Seria_Link General-Purpose (SGPIO) I/O header for S-
SATA 3.0 connections 0-3
SP1 Internal speaker/buzzer
SXB1A SMC-proprietary SPEC slot (Left) (See Note 2 below.)