Supermicro SuperServer E300-8D - Memory and Chipset Settings

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Chapter 5 BIOS
Chipset Conguration
Warning: Setting the wrong values in the following features may cause the system to
malfunction.
North Bridge

IIO Conguration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a processor
will always remain clear during electric tuning. The options are Disable and Enable.
IIO1 Conguration
M.2 PCI-E 3.0 X4

Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation
3) (8 GT/s).
CPU SLOT 6 PCI-E 3.0 X8

Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation
3) (8 GT/s).
CPU SLOT 7 PCI-E 3.0 X8

Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3 (Generation
3) (8 GT/s).
IOAT (Intel IO Acceleration) Conguration
Enable IOAT

reduces CPU overhead by leveraging CPU architectural improvements and freeing the
system resource for other tasks. The options are Disable and Enable.
No Snoop
Select Enable to support no-snoop mode for each CB device. The options are Disable
and Enable.