Synopsys TSMC180 - Page 6

DWC ADC 12b5M SAR, TSMC180 IP Databook
April 2012 Synopsys, Inc. 6-30
Parameter
Conditions
MIN
TYP
MAX
Unit
Timing Characteristics (Continued)
clk falling edge to sampling delay (tsd)
-
4.5
ns
soc setup time before clk rising edge (tsocst)
-
0
ns
soc hold time after clk rising edge (tsochld)
-
5
ns
clk rising edge to eoc rising edge delay time
(teocr)
With a 250 fF load
3
ns
clk rising edge to eoc falling edge delay time
(teocf)
With a 250 fF load
3
ns
Valid data out delay after eoc rising edge
(tdata)
With a 250 fF load
1
ns
Valid serial data output delay after clk falling
edge (tdatas)
With a 250 fF load
5
ns
loadcal hold time after clk falling edge
(tloadcalhold)
-
2
ns
loadcal setup time before clk rising edge
(tloadcalsetup)
-
1.5
ns
Power Supply Requirements
Analog Supply Voltage
1.8
3.3
3.6
V
Digital Supply Voltage
1.62
1.8
1.98
V
Current Consumption, Fs=5MSPS
1,3
avdd
dvdd
enadc=H, soc=H, seldiff=H
-
-
1100
100
-
-
µA
Current Consumption, Fs=1MSPS
1,3
avdd
dvdd
enadc=H, soc=H, seldiff=H
-
-
240
20
-
-
µA
Current Consumption, Fs=10kSPS
1,3
avdd
dvdd
enadc=H, soc=H, seldiff=H
-
-
17
1
-
-
µA
Current Consumption, Fs=5MSPS
1,3
avdd
dvdd
enadc=H, soc=H, seldiff=L
-
-
1000
100
-
-
µA
Current Consumption, Fs=1MSPS
1,3
avdd
dvdd
enadc=H, soc=H, seldiff=L
-
-
220
20
-
-
µA
Current Consumption, Fs=10kSPS
1,3
avdd
dvdd
enadc=H, soc=H, seldiff=L
-
-
17
1
-
-
µA
Current Consumption, Fs=5MSPS
2,3
avdd
dvdd
enadc=H, soc=L, seldiff=x
-
-
180
70
-
-
µA
Current Consumption, Fs=1MSPS
2,3
avdd
dvdd
enadc=H soc=L, seldiff=x
-
-
50
13
-
-
µA
Current Consumption, Fs=10kSPS
2,3
avdd
dvdd
enadc=H soc=L, seldiff=x
-
-
17
1
-
-
µA
Pow er down Current Consumption
3
avdd
dvdd
enadc=L, enldo=L, dislvl=H
(deep power down mode)
-
-
1
0.5
-
-
µA
Pow er down Current Consumption
3
avdd
dvdd
enadc=L, enldo=L, dislvl=L
(power down mode)
-
-
1
1
-
-
µA
Pow er down Current Consumption
3
avdd
dvdd
enadc=L, enldo=H, dislvl=L
(standby mode)
-
-
15
1
-
-
µA
Note 1 – Successiv e conv ersion mode (soc signal alway s set to high, check section 7)
Note 2 – soc signal set to low, waiting f or a conversion (check section 7)
Note 3 – avdd current consumption includes current consumption through vrefp