Synopsys TSMC180 - Page 7

DWC ADC 12b5M SAR, TSMC180 IP Databook
April 2012 Synopsys, Inc. 7-30
avdd = 3.3V, dvdd = 1.8V, Tjunction= 50°C, fclk=70MHz, f in=50kHz, selres=11 (12-bit mode), seldiff=L (single-ended mode), vrefp=av dd,
agndref=0, enldo=H.
Parameter
Conditions
MIN
TYP
MAX
Unit
DNL
1.0
LSB
INL
2.0
LSB
SINAD
4
68
dBFS
Offset error
Calibration enabled
Calibration disabled
2
64
LSB
LSB
Total unadjusted error
Calibration enabled
5
LSB
Note 4- Value measured with a –0.5dBFS input signal and then extrapolated to f ull scale.