3.3. LGA Pads Layout
A B C D E F G H J K L M N P R
1 ADC_IN1 SIMCLK2 SIMRST2 GND ANT_DIV GND GND GND ANT_MAIN GND VBATT VBATT_PA VBATT_PA
2 GND RES SIMIO2 SIMVCC2 GND GND GND GND GND GND GND VBATT VBATT_PA VBATT_PA GND
3 SIMVCC RES RES RES RES RES RES RES RES RES RES GND GND GND GND
4 SIMIN RES RES GND SGMII_RX_P SGMII_RX_M SIMIN2 ADC_IN2 RES RES RES GND GND GND RFU
5 SIMIO RES RES SGMII_TX_P RES GND GND GND
6 SIMCLK DVI_RX RES SGMII_TX_M RES GND GND GND
7 SIMRST DVI_TX RES ADC_IN3 GND GND GND RES RES RES GPS_LNA_EN
8 RES DVI_CLK GPIO_01 RES GND GND GND WCI_TXD_TGPIO24 RES GND GND
9 RES DVI_WA0 GPIO_02 RES GND GND GND WCI_RXD_TGPIO25 GPS_SYNC GND ANT_GPS
10 RES I2C_SDA GPIO_03 RES RFCLK2_QCA RES GND GND
11 HSIC_STB I2C_SCL GPIO_04 RES WLAN_SLEEP_CLK RES RES VAUX/PWRMON
12 HSIC_DATA REF_CLK GPIO_06 RES MMC_DAT0 MMC_CLK MMC_DAT1 MMC_DAT3 MMC_CMD MMC_DAT2 WIFI_SDRST GND RES RES ON_OFF*
13 VUSB GND GPIO_07 RES RES VMMC MMC_CD WIFI_SD3 WIFI_SD0 WIFI_SD2 WIFI_SDCLK WIFI_SD1 WIFI_SDCMD GND HW_SHUTDOWN*
14 USB_ID GPIO_05 RES RES GND RES RES SPI_CS / GPIO_11 RES RES C105/RTS C108/DTR C109/DCD C107/DSR C125/RING
15 USB_D+ USB_D-
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