LE910C1 Hardware User Guide
1VV0301298 Rev. 1.08 - 2017-11-14
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4.3. Logic Level Specifications
Unless otherwise specified, all the interface circuits of the LE910C1 are 1.8V CMOS logic.
Only few specific interfaces (such as USIM and SD Card) are capable of dual voltage I/O.
The following tables show the logic level specifications used in the LE910C1 interface circuits. The
data specified in the tables below is valid throughout all drive strengths and the entire temperature
ranges.
NOTE:
Do not connect LE910C1’s digital logic signal directly to OEM’s digital logic signal with a level
higher than 2.7V for 1.8V CMOS signals.
4.3.1. 1.8V Pads - Absolute Maximum Ratings
Table 9: Absolute Maximum Ratings - Not Functional
Parameter Min Max
Input level on any
digital pin when on
-0.3V +2.16V
Input voltage on
analog pins when on
-0.3V +2.16 V
4.3.2. 1.8V Standard GPIOs
Table 10: Operating Range – Interface Levels (1.8V CMOS)
Pad Parameter Min Max Unit Comment
V
IH
Input high level 1.25V -- [V]
V
IL
Input low level -- 0.6V [V]
V
OH
Output high level 1.4V -- [V]
V
OL
Output low level -- 0.45V [V]
I
IL
Low-level input leakage current -1 -- [uA] No pull-up
I
IH
High-level input leakage current -- +1 [uA] No pull-down
R
PU
Pull-up resistance 30 390 [kΩ]
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