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Product Architecture for Management of Random Faults
4 Product Architecture for Management of Random Faults
For a safety critical development, it is necessary to manage both systematic and random faults. The
C2000 MCU product architecture includes safety mechanisms that can help detect and respond to random
faults when used correctly. This section describes the architectural safety concept and software layers that
need to be adopted in C2000 MCU devices.
4.1 Philosophy and Architecture Partition for Safety Analysis
Piccolo and Delfino MCUs address functional safety with limited hardware assist and layers of supervisory
software libraries to detect system and device failure and prompt for corrective actions. This enables
simplified functional system partitioning during run time and distribute system level supervisors across the
memory, peripherals and analog modules.
Piccolo MCU family offers two distinct variant of safety implementation based on its hardware capabilities.
Most of the low end Piccolo (Piccolo2x) derivatives use single C28x CPU configurations, hence, the safety
features are primarily software functions along with main application firmware. Piccolo3x/6x and devices
has two options of enhancing the safety supervision using both C28x CPU and CLA. This configuration
can offer CPU level redundancies on critical functions to implement single and dual channel systems. This
is strong differentiator as it offers benefits of dissimilar instruction set and diversity during firmware
execution.
4.2 Management of Family Variants
The Piccolo and Delfino MCUs architecture supports multiple product variants. Table 2 shows an overview
of CPUs memory and peripherals that each of the Piccolo and Delfino MCU architectures support. Among
these families there are a number of devices each with different flavors of peripherals. To ascertain the
available CPU, memory or peripheral mix for each of these families, see the device-specific data sheet.
These products could be implemented as unique silicon designs or they may be shared silicon designs
that have elements disabled or not guaranteed by specification, even if present in silicon. Only the
elements that are enabled in the device as specified in the device-specific data sheet and technical
reference manual are to be used for safety feature enhancements or safety software implementation.
Elements that are not part of the device, even though it is supported in the superset of the device family,
are not guaranteed to be present and operate.
Table 2. C2000 MCU Features List
C2000 32-Bit Microcontrollers - MCU
Picollo Family
(1)
Delfino Family
TMS320F2806x TMS320F2805x TMS320F2803x TMS320F2802x TMS320F2833x TMS320F2823x
32-Bit CPU 90 MHz 80 MHz 60 MHz 60 MHz 150 MHz 150 MHz
C28x - CPU x x x x x x
Floating-Point Unit (FPU) x x
IQMath Capabilities x x x x x x
Viterbi Complex Math Unit (VCU) x
Control Law Accelerator ( CLA) x x x
Direct Memory Access (DMA) x x x
Memory
Boot ROM x x x x x x
Random-Access Memory (RAM) x x x x x x
FLASH x x x x x x
Read-Only Memory (ROM) x x x x
One-Time Programmable (OTP) x x x x x x
Peripheral Interrupts (PIE) x x x x x x
Control Peripherals
32-Bit CPU Timers x x x x x x
PWM x x x x x x
(1)
Piccolo2x also include Piccolo2x0 devices.
11
SPRUHI3A–April 2013–Revised August 2013 Safety Manual for C2000™ MCUs in IEC60730 Safety Applications
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Copyright © 2013, Texas Instruments Incorporated
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