SAFE
State
Powered
OFF
COLD
Boot
Warm
Boot
System
Init
28x CPU
Branches to
Flash Code
Execution
In
28x_CPU
Boot Mode
28x CPU
Starts
Boot Code
Execution
Cold Boot
Phase
Reset = xRSN
Power removed
Power Applied. xRSN = 0
xRSN = 0
xRSN = 1
Boot mode
Complete
SW Branches to
Flash
Boot Mode = Yes
xRSN = 0
xRSN = 0
xRSN = 0
SYSRSN = 1
System Init
Complete
Boot Mode = No
Warn Boot
Phase
Boot Mode
Phase
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Product Architecture for Management of Random Faults
4.5 C2000 MCUs Operating States
The C2000 MCU products have a common architectural definition of operating states. These operating
states should be observed by the system developer in their software and system level design concepts.
The operating states state machine is shown in Figure 9 and described below.
Figure 9. Piccolo and Delfino MCUs Operating States
• Powered Off - This is the initial operating state of the C2000 MCUs. No power is applied to either core
(V
DD
–1.8 V/1.2 V) or I/O power supply (V
DDIO
–3.3 V) and the device are non-functional. This state can
only transition to the safe state, and can only be reached from the safe state.
• Safe - In the safe state, the 28x CPU and its subsystems are powered but non-operational. The XRSN
(power-on reset, also known as cold reset) is asserted by the system but is not released until power
supplies have ramped to a stable state. The internal voltage monitor (POR and BOR) safety
mechanism also continues to assert the SYSRSN internal to the device if power supplies are not within
a minimum operational range. When the product is in the safe state, the CPUs and peripherals are
non-functional. Output drivers are tri-stated and input/output pins are kept in an input only state.
• Cold Boot - In the cold boot state, key analog elements, digital control logic, and debug logic are
initialize for future use. The CPUs and the peripherals remain powered but non-operational. When the
cold boot process is completed, the SYSRSN signal is internally released, leading to the warm boot
stage.
• Warm Boot - The warm boot mode resets digital logic and enables the C28x CPU. The C28x_CPU
begins executing software from Boot ROM, initializes the system and awaits boot mode. There is no
hardware interlock to say that warm boot is completed; this is a software decision in C28x Boot code.
• Operational and Boot Phase - In this state, only the C28x CPU enters Boot phase, checks for boot
modes and enters boot function if valid else C28x CPU branches to flash memory to do software
initialization and application code execution defined for the end application.
23
SPRUHI3A–April 2013–Revised August 2013 Safety Manual for C2000™ MCUs in IEC60730 Safety Applications
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