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Product Architecture for Management of Random Faults
4.4.1 Type C: C28x CPU + FPU With Control and Analog Subsystem – Delfino F2833x Family
Figure 7. C2000 MCU Delfino F2833x With Safety Features in Software
Delfino: TMS320F2833x MCU is the full featured C2000 MCU with a dedicated 32-bit C28x main CPU,
floating point unit, designed for high performance (150MHz)). CPU performance is capable of fixed point
math, IQmath and floating point precision. The main CPU has a built-in 40-bit CRC checker, the PSA that
can be used to do on-the-fly CRC calculations for any of the program code or memory blocks. This is a
differentiating hardware working in parallel to the main CPU to estimate the CRC on the memory contents
and CPU instructions. The IEC60730 software libraries have functions using the PSA hardware and
details of its use conditions. While most MCUs can calculate CRC in software using CRC algorithms, the
PSA hardware is a feature that prioritizes instruction and memory level integrity checks and enhances the
safety coverage for the CPU and memory regions.
Delfino memory has non-volatile Flash, OTP Flash, read-only memory (BROM) and RAM blocks. PSA-
based CRC or memory-based CRC and March 13 algorithms are made available to check memory
integrity in periodic and power up software routines.
The system integrator is responsible for the functional partition of these processing engines, depending on
the end application, as each application has different safety reactions and recovery times. The IEC60730
libraries enable easy implementation of safety software using the hardware and software functions.
Control Subsystem: Delfino devices have proven control peripherals such as PWMs, ECAP, and EQEP
modules as part of the MCUs control subsystem. These hardware peripherals are instantiated in multiple
instances on the same chip. This enables redundant channel implementation, thus enabling a higher level
of safety in the end equipment. Having redundant channels enables 1oo2 (1 out of 2 architecture) level
voting scheme on critical control channels.
The HRPWM module enhances the resolution of the PWM control and provides unique calibration logic to
track the PWM modulation accuracy and input clock oscillator accuracy. The oscillator accuracy library
functions use the SFO libraries, which use the inherent calibration logic, to measure the accuracy of the
oscillator clock and PLL.
21
SPRUHI3A–April 2013–Revised August 2013 Safety Manual for C2000™ MCUs in IEC60730 Safety Applications
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