LMK04821
,
LMK04826
,
LMK04828
SNAS605AR –MARCH 2013–REVISED DECEMBER 2015
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9.7.3.2 SYSREF_CLKin0_MUX, SYSREF_MUX
This register sets the source for the SYSREF outputs. Refer to Figure 13 and SYNC/SYSREF.
Table 24. Register 0x139
POR
BIT NAME DESCRIPTION
DEFAULT
7:3 NA 0 Reserved
Selects the SYSREF output from SYSREF_MUX or CLKin0 direct
Field Value SYSREF Source
SYSREF_
2 0
CLKin0_MUX
0 SYSREF Mux
1 CLKin0 Direct (from CLKin0_OUT_MUX)
Selects the SYSREF source.
Field Value SYSREF Source
0 (0x00) Normal SYNC
1:0 SYSREF_MUX 0
1 (0x01) Re-clocked
2 (0x02) SYSREF Pulser
3 (0x03) SYSREF Continuous
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