Texas Instruments LMK0482 Series User Manual

LMK04821 , LMK04826 , LMK04828
www.ti.com SNAS605AR –MARCH 2013–REVISED DECEMBER 2015
9.7.8.6 SYSREF_REQ_EN, PLL2_DLD_CNT
Table 69. PLL2_DLD_CNT[15:0]
MSB LSB
0x16A[5:0] 0x16B[7:0]
This register has the value of the PLL2 DLD counter.
Table 70. Registers 0x16A and 0x16B
POR
BIT REGISTERS NAME DESCRIPTION
DEFAULT
7 0x16A NA 0 Reserved
Enables the SYNC/SYSREF_REQ pin to force the SYSREF_MUX = 3 for
6 0x16A SYSREF_REQ_EN 0 continuous pulses. When using this feature enable pulser and set
SYSREF_MUX = 2 (Pulser).
The reference and feedback of PLL2 must be within the window of phase error
as specified by PLL2_WND_SIZE for PLL2_DLD_CNT cycles before PLL2 digital
lock detect is asserted.
PLL2_DLD
5:0 0x16A 32
Field Value Divide Value
_CNT[13:8]
0 (0x00) Not Valid
1 (0x01) 1
2 (0x02) 2
3 (0x03) 3
7:0 0x16B PLL2_DLD_CNT 0 ... ...
16,382 (0x3FFE) 16,382
16,383 (0x3FFF) 16,383
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Texas Instruments LMK0482 Series Specifications

General

Brand	Texas Instruments
Model	LMK0482 Series
Category	Motherboard
Language	English