Toradex Apalis Series - 2.7 LVDS LCD Interface

Apalis Carrier Board Design Guide
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2.7 LVDS LCD Interface
The Apalis module standard provides a LVDS interface with up to two channel and 24-bit for
displays. The interface is officially called FPD-Link or FlatLink. Please carefully study the datasheets
of individual Apalis modules for information regarding dual or single channel, 18 or 24-bit color
depth and color mapping support.
2.7.1 LVDS Signals
Apalis
Pin
Apalis
Signal Name
I/O
Type
Power
Rail
Description
246
LVDS1_A_CLK-
O
LVDS
LVDS Clock out for channel A
(odd pixels/single channel)
248
LVDS1_A_CLK+
O
LVDS
252
LVDS1_A_TX0-
O
LVDS
LVDS data lane 0 for channel A
(odd pixels/single channel)
254
LVDS1_A_TX0+
O
LVDS
258
LVDS1_A_TX1-
O
LVDS
LVDS data lane 1 for channel A
(odd pixels/single channel)
260
LVDS1_A_TX1+
O
LVDS
264
LVDS1_A_TX2-
O
LVDS
LVDS data lane 2 for channel A
(odd pixels/single channel)
266
LVDS1_A_TX2+
O
LVDS
270
LVDS1_A_TX3-
O
LVDS
LVDS data lane 3 for channel A
(odd pixels/single channel; unused for 18-bit)
272
LVDS1_A_TX3+
O
LVDS
276
LVDS1_B_CLK-
O
LVDS
LVDS Clock out for channel B
(even pixels/unused for single channel)
278
LVDS1_B_CLK+
O
LVDS
282
LVDS1_B_TX0-
O
LVDS
LVDS data lane 0 for channel B
(odd pixels/unused for single channel)
284
LVDS1_B_TX0+
O
LVDS
288
LVDS1_B_TX1-
O
LVDS
LVDS data lane 1 for channel B
(odd pixels/unused for single channel)
290
LVDS1_B_TX1+
O
LVDS
294
LVDS1_B_TX2-
O
LVDS
LVDS data lane 2 for channel B
(odd pixels/unused for single channel)
296
LVDS1_B_TX2+
O
LVDS
300
LVDS1_B_TX3-
O
LVDS
LVDS data lane 3 for channel B
(odd pixels/unused for single channel; unused for 18-bit)
302
LVDS1_B_TX3+
O
LVDS
239
BKL1_PWM
O
CMOS
3.3V
Backlight PWM, can be used to control the brightness of the LCD
backlight
286
BKL1_ON
O
CMOS
3.3V
Backlight enable signal
205
I2C2_SDA
I/O
OD
3.3V
I
2
C interface that might be used for the extended display identification
data (EDID) or as DDC if a converter to VGA or DVI is added. This
interface is shared with the other display interfaces.
207
I2C2_SCL
O
OD
3.3V
Table 16: LVDS LCD signals
2.7.2 Compatibility between LVDS Configurations
A single channel LVDS interface can provide resolutions up to 1280x1024 pixels (depending on
available displays). Displays with higher resolutions require a second LVDS channel. In this case,
the odd bits are transmitted in the first channel and the even bits are transmitted in the second
channel. Depending on the Apalis module, the LVDS transmitter will provide either single or dual
channel signals. Some modules may be more flexible in their ability to configure the output mode
of the transmitter. Please consult the applicable Apalis module datasheet for information about
supported channel modes. As the following figure shows, it is not possible to connect a single
channel display to a dual channel output and vice versa.