Toradex Apalis Series - 2.13 SD;MMC;SDIO

Apalis Carrier Board Design Guide
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2.11 Parallel Camera Interface
The Apalis module standard features an 8-bit parallel camera interface as a standard interface.
Depending on the module, there are maybe additional bits available in the type-specific area.
Only the 8-bit YUV and ITU-R BT.656 format mode is intent to keep compatible between Apalis
modules. Consult the Apalis datasheets for more information regarding the additional available
input modes (e. g. Bayer, RGB etc.).
2.11.1 Parallel Camera Signals
Apalis
Pin
Apalis
Signal Name
I/O
Type
Power
Rail
Description
187
CAM1_D0
I
CMOS
3.3V
Video input pixel data
185
CAM1_D1
I
CMOS
3.3V
183
CAM1_D2
I
CMOS
3.3V
181
CAM1_D3
I
CMOS
3.3V
179
CAM1_D4
I
CMOS
3.3V
177
CAM1_D5
I
CMOS
3.3V
175
CAM1_D6
I
CMOS
3.3V
173
CAM1_D7
I
CMOS
3.3V
191
CAM1_PCLK
I
CMOS
3.3V
Video input pixel clock
195
CAM1_VSYNC
I
CMOS
3.3V
Video input vertical sync
197
CAM1_HSYNC
I
CMOS
3.3V
Video input horizontal sync
193
CAM1_MCLK
O
CMOS
3.3V
Master clock output for the camera. Some cameras might not need this
clock since they already use other clock sources
201
I2C3_SDA
I/O
OD
3.3V
Camera I
2
C interface - might be needed in the autofocus unit
203
I2C3_SCL
O
OD
3.3V
Table 20: Parallel Camera Signals
2.11.2 Unused Parallel Camera Interface Signal Termination
All unused parallel camera input signals can be left unconnected if the interface is disabled in
software. These signals may be able to be used as GPIOs when they are not used as camera
interface. Please consult the applicable Apalis module datasheet.
2.12 Camera Serial Interface (MIPI/CSI-2)
The MIPI/CSI-2 interface is not a standard interface in the Apalis module family. If a module
features CSI, the according signals are located in the type-specific area of the MXM3 module edge
connector. Toradex tries to keep the position of the signals compatible between the different
modules but as it is not a standard interface it is not guaranteed. For more information to the
interface, please consult the according datasheet of the Apalis module.
2.13 SD/MMC/SDIO
The Apalis module form factor features two SDIO interfaces as standard interfaces. One of these
interfaces can provide up to 8 data bit which can be used for interfacing MMCplus cards and
eMMC memory chips. The 8-bit interface is backward compatible with the 4bit data bus and can
be used for SD, SDIO and MMC devices. The SD and SDIO interface can only make use of the 4-
bit wide data bus, as there is no 8-bit SD interface defined.
On carrier board that implements only one SD interface, it is recommended using MMC1 interface
over the SD1. A module that features only one SD/MMC interface will implement the MMC1 and
leave SD1 unconnected.