2.9.2 Reference Schematics
The horizontal and vertical sync signals need to be level shifted on the baseboard. The same is true
for the DDC I
2
C signals. In the VGA connector standard, the carrier board needs to provide 5V
power supply for the EDID memory on the DDC. This allows the system to read out the EDID
information of an attached display even if it is not powered. Unfortunately, some displays source
the 5V internally and also provide internal pull-up resistors to the I
2
C lines. This can cause back-
feeding problems. Therefore, we recommend connecting the display and pull-up resistor 5V supply
over a diode to the module supply.
It is mandatory to place a 150Ω resistor to ground on every analogue RGB signal. Place this
resistor as close to the VGA connector as possible. Before this resistor, the signal trace can be
routed with 50Ω impedance. After the resistor, the signal should be routed with 75Ω impedance.
Depending on the layer stack up, 75Ω traces cannot be reached due to the width becoming too
small. In this case, lower traces impedance (e.g. 50Ω) can be used but the trace length should be
kept short.
All signals on the VGA D-SUB connector need to be ESD protected. TSR diodes can be used. It is
recommended that a PI-filter is added to the analogue RGB signals. The values for the capacitors
and inductors depend on the maximum display resolution required. The PI-filter reduces EMI
problems, but also limits the maximum bandwidth of the VGA signal.
Figure 41: VGA reference schematic
2.9.3 Unused VGA Interface Signal Termination
All unused VGA interface signals can be left unconnected.
2.10 Display Serial Interface (MIPI/DSI)
The MIPI/DSI interface is not a standard interface in the Apalis module family. If a module features
DSI, the according signals are located in the type-specific area of the MXM3 module edge
connector. Toradex tries to keep the position of the signals compatible between the different
modules but as it is not a standard interface it is not guaranteed. For more information to the
interface, please consult the according datasheet of the Apalis module.
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