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TYAN S1846 - Memory Hole

TYAN S1846
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DRAM Refresh Rate
This option specifies the interval between refresh signals to DRAM system
memory. The settings are 15.6 us (microseconds), 31.2 us, 62.4 us, 124.8 us, or
249.6 us.
Memory Hole
This option specifies the location of an area of memory that cannot be
addressed on the ISA bus. The settings are Disabled, 512KB-640KB, or 15MB-
16MB.
SDRAM RAS# to CAS# Delay
This option specifies the length of the a inserted between the RAS and CAS
signals of the DRAM system memory access cycle if SDRAM is installed. The
settings are Auto, 2 SCLKs or 3 SCLKs.
SDRAM RAS# Precharge
(CHANGE) This option specifies the length of the RAS precharge part of the
DRAM system memory access cycle when SDRAM system memory is
installed in this computer. The settings are Auto, 2 SCLKs, or 3 SCLKs.
Power Down SDRAM
BIOS

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