TYAN S5652 - Page 20

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20
MCIO0: MCIO0 Connector
Signal Name Pin Pin Signal Name
GND A1 B1 GND
CPU0_PE4_RX_DN<7> A2 B2 CPU0_PE4_TX_DN<7>
CPU0_PE4_RX_DP<7> A3 B3 CPU0_PE4_TX_DP<7>
GND A4 B4 GND
CPU0_PE4_RX_DN<6> A5 B5 CPU0_PE4_TX_DN<6>
CPU0_PE4_RX_DP<6> A6 B6 CPU0_PE4_TX_DP<6>
GND A7 B7 GND
PE4_TYPEA A8 B8 CPU0_PE4_HDD0_SCL0
WAKE_NVME_N0 A9 B9 CPU0_PE4_HDD0_SDA0
GND A10 B10 GND
CLK_100M_DB2000_CPU0_N
VME1_DP
A11 B11 RST_NVME0_CPU0_PERST_N
CLK_100M_DB2000_CPU0_N
VME1_DN
A12 B12 FM_CPU0_PE4_PRSTNA_N
GND A13 B13 GND
CPU0_PE4_RX_DN<5> A14 B14 CPU0_PE4_TX_DN<5>
CPU0_PE4_RX_DP<5> A15 B15 CPU0_PE4_TX_DP<5>
GND A16 B16 GND
CPU0_PE4_RX_DN<4> A17 B17 CPU0_PE4_TX_DN<4>
CPU0_PE4_RX_DP<4> A18 B18 CPU0_PE4_TX_DP<4>
GND A19 B19 GND
CPU0_PE4_RX_DN<3> A20 B20 CPU0_PE4_TX_DN<3>
CPU0_PE4_RX_DP<3> A21 B21 CPU0_PE4_TX_DP<3>
GND A22 B22 GND
CPU0_PE4_RX_DN<2> A23 B23 CPU0_PE4_TX_DN<2>
CPU0_PE4_RX_DP<2> A24 B24 CPU0_PE4_TX_DP<2>
GND A25 B25 GND
PE4_TYPEB A26 B26 CPU0_PE4_HDD0_SCL1
WAKE_NVME_N1 A27 B27 CPU0_PE4_HDD0_SDA1
GND A28 B28 GND
CLK_100M_DB2000_CPU0_N
VME2_DP
A29 B29 RST_NVME1_CPU0_PERST_N
CLK_100M_DB2000_CPU0_N
VME2_DN
A30 B30 FM_CPU0_PE4_PRSTNB_N
GND A31 B31 GND
CPU0_PE4_RX_DN<1> A32 B32 CPU0_PE4_TX_DN<1>
CPU0_PE4_RX_DP<1> A33 B33 CPU0_PE4_TX_DP<1>
GND A34 B34 GND
CPU0_PE4_RX_DN<0> A35 B35 CPU0_PE4_TX_DN<0>
CPU0_PE4_RX_DP<0> A36 B36 CPU0_PE4_TX_DP<0>
GND A37 B37 GND