VIPA SSM-BG41 - 3964 R with RK512

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Examples Manual BG41/BG42/BG43

5-28 Rev. 99/49

5.6.3 3964R with RK512

With this example the SEND order between interface 1 and 2 and a FETCH order between interface

2 and 3 of the building block BG42 and BG43 are realised.

The SEND order is initiated by setting the flag M1.0. After the SEND order is completed M1.0 is

reset. As described in the example, the FB 'SEND' must run until "order completed" has been

reported back.

The FETCH order is initiated by setting the flag M1.1. After the FETCH order has been completed

M1.1 is reset. As described in the example, the FB 'FETCH' must run until "order completed" has

been reported back.

The building blocks necessary for the two orders are provided in the following:

Cold Restart OB

OB20

BIB #6075

00000 :SPA FB 27

NAME #SYNCHRON

ADRE =KH F080 Base address

SSNR =KF +1 Interface number

BAUD =KF +10 Baud rate (9600)

FORM =KM 00000001 11111100 Parity even, 2 Stop bits, 8 bits per byte

PRIO =KF +0 Low transmission priority

BLOC =KF +64 Block size between SPS and card

ZVZ =KF +20 Character delay time 200 ms

QVZ =KF +220 Acknowledgement delay time 2200 ms

PAFE =MB 199 Error byte

NEUS =M 0.0 New start flag

0000C :

0000D :SPA FB 27