Wang 5536 - Page 24

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o MREQ -- Memory Request. Active when the CPU accesses memory to fetch
either an instruction or data.
0 IORQ Input/Output
input or an output
acknowledge cycles.
Request. Becomes
to a peripheral
active
device
to indicate
during the
either an
interrupt-
o RD -- Read. When active, indicates that the CPU will input data while
performing a memory-access or I/O instruction.
o WR -- Wr i te •
When active, indicates that the CPU will output data while
0
performing a memory-access or I/O instruction.
RFSH -- Refresh.
an address for
that address.
During an Ml (memory period 1) cycle, the CPU outputs
memory refresh. RFSH confirms the active presence of
CRT
SCAN
LOGIC
CRT MEMORY
"e "s Ve Vs ROWS
COLUMN DOT TIME
INOO
N '
IN01
._ READ SWll CH BANK
" •OUT OOCllCKtH
•OUT 01 SPEAKER
OUT ·•OUT02HORIZONTAL SCROLL
DECODE •6UT06 lHARACHRPROMNO I
•OUT07 CHAHACHRl-IHOMNO J
CRT TUBE
PARITY ERROR
MEM
Wii
ADDRESS BUS
OiiiBUs-·-
Figure 2-6. Z80A CPU
2-10
r----.RAS
MEMORY
SEQUENCE
DATA
LINK
CAS
OLS
TNC BNC
COAX C4BLES
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TOMASTEfl
SYS HM
WORK
STATION
MAIN
RAM
MEMORY
14BKI
48K BFFF
l2Kt TFFFI
· 16K(3FFFI
OMA
SfOUlNCtS
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