Wang 5536 - Page 35

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Read Interrupt Status
Instruction IN X '03'
BIT
DO
Dl
D2
D3
MEANING
KEY
TXRDY
RXRDY
10 MS
The status signals from the modern interface are sensed:
0
0
0
0
KEY
RXRDY
TXRDY
10 MS
Key Stroke Interrupt
Receiver Interrupt
Transmitter Interrupt
10 Millisecond Timer Interrupt
Read Telecommunications Port ID Switch
3402
Instruction IN X '04'
4.5.1.
Refer to TC switch settings in Chapter 4, section
Input Received Character from USART
Instruction IN X '15'
A received character is input from the USART by the Input
Character instruction. This clears the receiver ready condition
interrupt condition which it causes. If a transmission character
than 8 bits is being used, the character to be transmitted·
adjusted in the byte input into the accunrulator.
Read USART Status
Instruction IN X '35'
0
0
The USART status register
DSR
BRKD
Data Set Ready
Break Detect
is
BIT MEANING
DO TxR
Dl RxR
D2
TxE
D3 PE
D4
OE
D5
FE
D6 BRKD
D7
DSR
read:
Received
and the
of fewer
is right
0 FE
Receiver Framing Error (applicable to asynchronous transmission
only)
0
OE
0 PE
0 TxE
0
RxR
0 TxR
Receiver Overrun Error
Receiver Parity Error
Transmitter Empty
Receiver Ready (this bit generates an interrupt)
Transmitter Ready (This bit generates an interrupt. If the
transmitter is not enabled the interrupt wil not be generated,
but TxR wi 11 be seen as set when read in from the USART status
register).
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